hda-dma fix: align DGMBS value to 32 bits

If DSP Gateway Minimum Buffer Size (DGMBS) is not aligned to 32 bits they occur
glitches in output signal (the buffer will be overwritten during work). It can
be observed during playback in following configuration:
- 8Khz 16bits 1 channel (16bits periods value)
- 24kHz 16bits 1 channel (48bits periods value)

Signed-off-by: Kamil Kulesza <kamil.kulesza@linux.intel.com>

Author: kakulesza

src/drivers/hda-dma.c

@@ -44,6 +44,7 @@
 #include <sof/ipc.h>
 #include <sof/pm_runtime.h>
 #include <sof/wait.h>
+#include <sof/audio/format.h>
 #include <platform/dma.h>
 #include <arch/cache.h>
 #include <uapi/ipc.h>
@@ -367,7 +368,7 @@ static int hda_dma_set_config(struct dma *dma, int channel,
 	host_dma_reg_write(dma, channel, DGBS,  buffer_bytes);
 	host_dma_reg_write(dma, channel, DGBFPI,  0);
 	host_dma_reg_write(dma, channel, DGBSP,  period_bytes);
-	host_dma_reg_write(dma, channel, DGMBS,  period_bytes);
+	host_dma_reg_write(dma, channel, DGMBS,  ALIGN_UP(period_bytes, 32));
 	host_dma_reg_write(dma, channel, DGLLPI,  0);
 	host_dma_reg_write(dma, channel, DGLPIBI,  0);