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Power gate DSP SRAM banks for D0->D3 flow (#135)
Power gate DSP SRAM banks for D0->D3 flow from locked L1$. No DSP context is preserved. On D0->D3 Driver reinitializes DSP HW. Signed-off-by: Lech Betlej <lech.betlej@linux.intel.com>
1 parent ca6b403 commit a292d45

11 files changed

Lines changed: 348 additions & 8 deletions

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‎src/ipc/apl-ipc.c‎

Lines changed: 3 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -51,6 +51,7 @@
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#include <sof/audio/pipeline.h>
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#include <uapi/ipc.h>
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#include <sof/intel-ipc.h>
54+
#include <platform/pm_runtime.h>
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5556
extern struct ipc *_ipc;
5657

@@ -136,8 +137,8 @@ void ipc_platform_do_cmd(struct ipc *ipc)
136137
// TODO: signal audio work to enter D3 in normal context
137138
/* are we about to enter D3 ? */
138139
if (iipc->pm_prepare_D3) {
139-
while (1)
140-
wait_for_interrupt(0);
140+
/* no return - memory will be powered off */
141+
platform_pm_runtime_power_off();
141142
}
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143144
tracev_ipc("CmD");

‎src/platform/apollolake/Makefile.am‎

Lines changed: 8 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -14,14 +14,21 @@ libplatform_a_SOURCES = \
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timer.c \
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interrupt.c \
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memory.c \
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pm_runtime.c
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pm_runtime.c \
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power_down.S
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libplatform_a_CFLAGS = \
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$(ARCH_CFLAGS) \
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$(ARCH_INCDIR) \
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$(PLATFORM_INCDIR) \
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$(SOF_INCDIR)
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libplatform_a_CCASFLAGS = \
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$(ARCH_INCDIR) \
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$(ASFLAGS) \
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$(ARCH_ASFLAGS) \
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$(PLATFORM_INCDIR)
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2532
noinst_PROGRAMS = module boot_module
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module_SOURCES = \

‎src/platform/apollolake/include/platform/Makefile.am‎

Lines changed: 3 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -9,4 +9,6 @@ noinst_HEADERS = \
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platform.h \
1010
pm_runtime.h \
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shim.h \
12-
timer.h
12+
timer.h \
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asm_memory_management.h \
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power_down.h

‎src/platform/apollolake/include/platform/asm_memory_management.h‎

Lines changed: 95 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,95 @@
1+
/*
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* Copyright (c) 2018, Intel Corporation
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
6+
* modification, are permitted provided that the following conditions are met:
7+
* * Redistributions of source code must retain the above copyright
8+
* notice, this list of conditions and the following disclaimer.
9+
* * Redistributions in binary form must reproduce the above copyright
10+
* notice, this list of conditions and the following disclaimer in the
11+
* documentation and/or other materials provided with the distribution.
12+
* * Neither the name of the Intel Corporation nor the
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* names of its contributors may be used to endorse or promote products
14+
* derived from this software without specific prior written permission.
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*
16+
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
18+
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
19+
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
20+
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
21+
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
22+
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
23+
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
24+
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
25+
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
26+
* POSSIBILITY OF SUCH DAMAGE.
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*
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* Author: Lech Betlej <lech.betlej@linux.intel.com>
29+
*/
30+
31+
/**
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* \file platform/apollolake/include/platform/asm_memory_management.h
33+
* \brief Macros for power gating memory banks specific for Apollolake
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* \author Lech Betlej <lech.betlej@linux.intel.com>
35+
*/
36+
#ifndef ASM_MEMORY_MANAGEMENT_H
37+
#define ASM_MEMORY_MANAGEMENT_H
38+
39+
#ifndef ASSEMBLY
40+
#warning "ASSEMBLY macro not defined."
41+
#endif
42+
43+
#include <platform/shim.h>
44+
#include <platform/platcfg.h>
45+
46+
#define HPSRAM_MASK ((1 << PLATFORM_HPSRAM_EBB_COUNT) - 1)
47+
#define LPSRAM_MASK ((1 << PLATFORM_LPSRAM_EBB_COUNT) - 1)
48+
49+
/* Macro powers down entire hpsram. on entry literals and code for
50+
* section from where this code is executed needs to be placed in
51+
* memory which is not HPSRAM (in case when this code is located in
52+
* HPSRAM lock memory in L1$ or L1 SRAM)
53+
*/
54+
.macro m_cavs_hpsram_power_off ax, ay, az
55+
// SEGMENT #0
56+
movi \az, (SHIM_BASE + SHIM_HSPGISTS)
57+
movi \ax, (SHIM_BASE + SHIM_HSPGCTL)
58+
movi \ay, HPSRAM_MASK
59+
s32i \ay, \ax, 0
60+
memw
61+
/* since HPSRAM EBB bank #0 might be used as buffer for legacy
62+
* streaming, should not be checked in status
63+
*/
64+
movi \ax, 0xfffffffe
65+
and \ay, \ay, \ax
66+
1 :
67+
l32i \ax, \az, 0
68+
and \ax, \ax, \ay
69+
bne \ax, \ay, 1b
70+
/* there is no possibility to check from DSP whether EBB #0 is actually
71+
* in use therefore wait additional 4K DSP cycles as chicken check -
72+
* after that time EBB #0 should be already power gated unless is used
73+
* by other HW components (like HD-A)
74+
*/
75+
l32i \ax, \az, 0
76+
beq \ax, \ay, m_cavs_hpsram_power_off_end
77+
movi \ax, 4096
78+
1 :
79+
addi \ax, \ax, -1
80+
bnez \ax, 1b
81+
m_cavs_hpsram_power_off_end :
82+
.endm
83+
84+
.macro m_cavs_lpsram_power_off ax, ay, az
85+
movi \az, (SHIM_BASE + SHIM_LSPGISTS)
86+
movi \ax, (SHIM_BASE + SHIM_LSPGCTL)
87+
movi \ay, LPSRAM_MASK
88+
s32i \ay, \ax, 0
89+
memw
90+
1 :
91+
l32i \ax, \az, 0
92+
bne \ax, \ay, 1b
93+
.endm
94+
95+
#endif /* ASM_MEMORY_MANAGEMENT_H */

‎src/platform/apollolake/include/platform/platcfg.h‎

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@@ -37,6 +37,12 @@
3737

3838
#define PLATFORM_CORE_COUNT 2
3939

40+
#define PLATFORM_LPSRAM_EBB_COUNT 2
41+
42+
#define PLATFORM_HPSRAM_EBB_COUNT 8
43+
44+
#define PLATFORM_HPSRAM_SEGMENTS 1
45+
4046
#define PLATFORM_MASTER_CORE_ID 0
4147

4248
#endif

‎src/platform/apollolake/include/platform/pm_runtime.h‎

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Original file line numberDiff line numberDiff line change
@@ -62,4 +62,11 @@ void platform_pm_runtime_get(enum pm_runtime_context context);
6262
*/
6363
void platform_pm_runtime_put(enum pm_runtime_context context);
6464

65+
66+
/**
67+
* \brief Power gates platform specific hardware resources.
68+
* \param[in] context Type of power management context.
69+
*/
70+
void platform_pm_runtime_power_off(void);
71+
6572
#endif /* __INCLUDE_PLATFORM_PM_RUNTIME__ */

‎src/platform/apollolake/include/platform/power_down.h‎

Lines changed: 43 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,43 @@
1+
/*
2+
* Copyright (c) 2018, Intel Corporation
3+
* All rights reserved.
4+
*
5+
* Redistribution and use in source and binary forms, with or without
6+
* modification, are permitted provided that the following conditions are met:
7+
* * Redistributions of source code must retain the above copyright
8+
* notice, this list of conditions and the following disclaimer.
9+
* * Redistributions in binary form must reproduce the above copyright
10+
* notice, this list of conditions and the following disclaimer in the
11+
* documentation and/or other materials provided with the distribution.
12+
* * Neither the name of the Intel Corporation nor the
13+
* names of its contributors may be used to endorse or promote products
14+
* derived from this software without specific prior written permission.
15+
*
16+
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
17+
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
18+
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
19+
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
20+
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
21+
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
22+
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
23+
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
24+
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
25+
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
26+
* POSSIBILITY OF SUCH DAMAGE.
27+
*
28+
* Author: Lech Betlej <lech.betlej@linux.intel.com>
29+
*/
30+
#ifndef POWER_DOWN_H
31+
#define POWER_DOWN_H
32+
33+
#include <stdbool.h>
34+
/**
35+
* Power down procedure.
36+
* Locks its code in L1 cache and shuts down memories.
37+
* @param disable_lpsram flag if LPSRAM is to be disabled (whole)
38+
* @param hpsram_pwrgating_mask pointer to memory segments power gating mask
39+
* (each bit corresponds to one ebb)
40+
* @return nothing returned - this function never quits
41+
*/
42+
void power_down(bool disable_lpsram, uint32_t *hpsram_pwrgating_mask);
43+
#endif /* POWER_DOWN_H */

‎src/platform/apollolake/include/platform/shim.h‎

Lines changed: 14 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -152,6 +152,8 @@
152152
#define SHIM_CLKCTL_RXOSCC (0x1 << 30)
153153
#define SHIM_CLKCTL_RFROSCC (0x1 << 29)
154154

155+
#define SHIM_LDOCTL 0xA4
156+
155157
/* LP GPDMA Force Dynamic Clock Gating bits, 0--enable */
156158
#define SHIM_CLKCTL_LPGPDMAFDCGB(x) (0x1 << (26 + x))
157159
#define SHIM_CLKCTL_DMICFDCGB (0x1 << 24)
@@ -165,9 +167,11 @@
165167
#define SHIM_CLKCTL_TCPAPLLS (0x1 << 7)
166168

167169
/* 0--from PLL, 1--from oscillator */
170+
#define SHIM_CLKCTL_LDCS (0x1 << 5)
168171
#define SHIM_CLKCTL_HDCS (0x1 << 4)
169172

170-
/* Oscillator select */
173+
/* Oscillator clock select select 0--XTAL, 1--Fast RING*/
174+
#define SHIM_CLKCTL_LDOCS (0x1 << 3)
171175
#define SHIM_CLKCTL_HDOCS (0x1 << 2)
172176

173177
/* HP memory clock PLL divisor */
@@ -177,9 +181,16 @@
177181
#define SHIM_PWRSTS 0x92
178182
#define SHIM_LPSCTL 0x94
179183

180-
/* HP SRAM Power Gating */
184+
/* HP & LP SRAM Power Gating */
181185
#define SHIM_HSPGCTL 0x80
182-
#define SHIM_HPGISTS 0xb0
186+
#define SHIM_LSPGCTL 0x84
187+
#define SHIM_SPSREQ 0xa0
188+
189+
#define SHIM_SPSREQ_RVNNP (0x1 << 0)
190+
191+
#define SHIM_HSPGISTS 0xb0
192+
#define SHIM_LSPGISTS 0xb4
193+
183194

184195
#define SHIM_LPSCTL_FDSPRUN (0X1 << 9)
185196
#define SHIM_LPSCTL_FDMARUN (0X1 << 8)

‎src/platform/apollolake/pm_runtime.c‎

Lines changed: 14 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -38,6 +38,7 @@
3838
#include <platform/platform.h>
3939
#include <platform/pm_runtime.h>
4040
#include <platform/cavs/pm_runtime.h>
41+
#include <platform/power_down.h>
4142

4243
/** \brief Runtime power management data pointer. */
4344
struct pm_runtime_data *_prd;
@@ -65,3 +66,16 @@ void platform_pm_runtime_put(enum pm_runtime_context context)
6566
break;
6667
}
6768
}
69+
70+
void platform_pm_runtime_power_off(void)
71+
{
72+
uint32_t hpsram_mask[PLATFORM_HPSRAM_SEGMENTS];
73+
//TODO: add LDO control for LP SRAM - set LDO BYPASS & LDO ON
74+
//TODO: mask to be used in the future for run-time power management of
75+
//SRAM banks
76+
/* power down entire HPSRAM */
77+
hpsram_mask[0] = 0x1;
78+
79+
power_down(true, hpsram_mask);
80+
}
81+

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