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andrew-mtklgirdwood
andrew-mtk
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platform: mtk: Add support for mt8365 platform
mt8365 platform integrates a single-core HIFI4 DSP. The highest DSP operation frequency is 600MHz which requires 0.75v working voltage. otherwise, it should switch to 13M which can operate at the lowest working voltage 0.55v. Signed-off-by: Andrew Perepech <andrew.perepech@mediatek.com>
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‎src/platform/mt8365/include/platform/drivers/idc.h‎

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/* SPDX-License-Identifier: BSD-3-Clause */
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/*
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* Copyright(c) 2024 MediaTek. All rights reserved.
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*
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* Author: Andrew Perepech <andrew.perepech@mediatek.com>
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*/
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#if defined(__XTOS_RTOS_IDC_H__) || defined(__ZEPHYR_RTOS_IDC_H__)
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#ifndef __PLATFORM_DRIVERS_IDC_H__
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#define __PLATFORM_DRIVERS_IDC_H__
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#include <stdint.h>
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struct idc_msg;
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static inline int idc_send_msg(struct idc_msg *msg, uint32_t mode)
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{
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return 0;
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}
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static inline int idc_init(void)
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{
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return 0;
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}
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#endif /* __PLATFORM_DRIVERS_IDC_H__ */
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#else
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#error "This file shouldn't be included from outside of Zephyr/XTOS's rtos/idc.h"
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#endif

‎src/platform/mt8365/include/platform/lib/clk.h‎

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/* SPDX-License-Identifier: BSD-3-Clause */
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/*
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* Copyright(c) 2024 MediaTek. All rights reserved.
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*
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* Author: Andrew Perepech <andrew.perepech@mediatek.com>
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*/
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#ifdef __SOF_LIB_CLK_H__
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#ifndef __PLATFORM_LIB_CLK_H__
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#define __PLATFORM_LIB_CLK_H__
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#include <stdint.h>
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struct sof;
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#define CPU_DEFAULT_IDX 4
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#define CLK_CPU(x) (x)
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#define CLK_DEFAULT_CPU_HZ 600000000
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#define CLK_MAX_CPU_HZ 600000000
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#define CLK_SUSPEND_CPU_HZ 26000000
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#define NUM_CLOCKS 1
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#define NUM_CPU_FREQ 5
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void platform_clock_init(struct sof *sof);
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#define REG_APMIXDSYS_BASE 0x1000C000
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#define REG_TOPCKGEN_BASE 0x10000000
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#define DSPPLL_CON0 (REG_APMIXDSYS_BASE + 0x390)
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#define DSPPLL_CON1 (REG_APMIXDSYS_BASE + 0x394)
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#define DSPPLL_CON2 (REG_APMIXDSYS_BASE + 0x398)
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#define DSPPLL_CON3 (REG_APMIXDSYS_BASE + 0x39C)
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#define ULPLL_CON0 (REG_APMIXDSYS_BASE + 0x3B0)
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#define ULPLL_CON1 (REG_APMIXDSYS_BASE + 0x3B4)
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#define PLL_BASE_EN BIT(0)
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#define PLL_PWR_ON BIT(0)
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#define PLL_ISO_EN BIT(1)
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#define DSPPLL_312MHZ 0
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#define DSPPLL_400MHZ 1
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#define DSPPLL_600MHZ 2
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#define CLK_MODE (REG_TOPCKGEN_BASE + 0x0)
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#define CLK_CFG_UPDATE1 (REG_TOPCKGEN_BASE + 0x8)
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#define CLK_CFG_8 (REG_TOPCKGEN_BASE + 0xC0)
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#define CLK_CFG_8_SET (REG_TOPCKGEN_BASE + 0xC4)
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#define CLK_CFG_8_CLR (REG_TOPCKGEN_BASE + 0xC8)
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#define CLK_SCP_CFG_1 (REG_TOPCKGEN_BASE + 0x204)
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#define CLK_DSP_SEL_26M 0
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#define CLK_DSP_SEL_26M_D_2 1
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#define CLK_DSP_SEL_DSPPLL 2
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#define CLK_DSP_SEL_DSPPLL_D_2 3
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#define CLK_DSP_SEL_DSPPLL_D_4 4
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#define CLK_DSP_SEL_DSPPLL_D_8 5
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#define CLK_TOPCKGEN_SEL_PLLGP_26M 1
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#define CLK_TOPCKGEN_SEL_ULPLL_26M 2
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#define CLK_TOPCKGEN_SEL_GPIO_26M 4
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enum mux_id_t {
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MUX_CLK_DSP_SEL = 0,
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MUX_CLK_TOPCKGEN_26M_SEL,
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HIFI4DSP_MUX_NUM,
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};
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enum mux_26m_t {
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DCXO_26 = 0,
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ULPLL_26M,
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};
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enum DSP_HW_DSP_CLK {
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DSP_CLK_13M = 0,
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DSP_CLK_26M,
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DSP_CLK_PLL_312M,
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DSP_CLK_PLL_400M,
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DSP_CLK_PLL_600M,
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};
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#endif /* __PLATFORM_LIB_CLK_H__ */
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#else
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#error "This file shouldn't be included from outside of sof/lib/clk.h"
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#endif /* __SOF_LIB_CLK_H__ */

‎src/platform/mt8365/include/platform/lib/cpu.h‎

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/* SPDX-License-Identifier: BSD-3-Clause */
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/*
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* Copyright(c) 2024 MediaTek. All rights reserved.
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*
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* Author: Andrew Perepech <andrew.perepech@mediatek.com>
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*/
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#ifdef __SOF_LIB_CPU_H__
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#ifndef __PLATFORM_LIB_CPU_H__
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#define __PLATFORM_LIB_CPU_H__
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/** \brief Id of primary DSP core */
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#define PLATFORM_PRIMARY_CORE_ID 0
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#endif /* __PLATFORM_LIB_CPU_H__ */
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#else
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#error "This file shouldn't be included from outside of sof/lib/cpu.h"
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#endif /* __SOF_LIB_CPU_H__ */

‎src/platform/mt8365/include/platform/lib/dai.h‎

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/* SPDX-License-Identifier: BSD-3-Clause */
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/*
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* Copyright(c) 2024 MediaTek. All rights reserved.
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*
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* Author: Andrew Perepech <andrew.perepech@mediatek.com>
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*/
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#ifdef __SOF_LIB_DAI_H__
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#ifndef __PLATFORM_LIB_DAI_H__
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#define __PLATFORM_LIB_DAI_H__
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#endif /* __PLATFORM_LIB_DAI_H__ */
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#else
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#error "This file shouldn't be included from outside of sof/lib/dai.h"
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#endif /* __SOF_LIB_DAI_H__ */

‎src/platform/mt8365/include/platform/lib/dma.h‎

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/* SPDX-License-Identifier: BSD-3-Clause */
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/*
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* Copyright(c) 2024 MediaTek. All rights reserved.
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*
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* Author: Andrew Perepech <andrew.perepech@mediatek.com>
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*/
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#ifdef __SOF_LIB_DMA_H__
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#ifndef __PLATFORM_LIB_DMA_H__
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#define __PLATFORM_LIB_DMA_H__
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#define PLATFORM_NUM_DMACS 2
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/* max number of supported DMA channels */
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#define PLATFORM_MAX_DMA_CHAN 32
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#define DMA_ID_AFE_MEMIF 0
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#define DMA_ID_HOST 1
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#define dma_chan_irq(dma, chan) dma_irq(dma)
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#define dma_chan_irq_name(dma, chan) dma_irq_name(dma)
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#endif /* __PLATFORM_LIB_DMA_H__ */
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#else
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#error "This file shouldn't be included from outside of sof/lib/dma.h"
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#endif /* __SOF_LIB_DMA_H__ */

‎src/platform/mt8365/include/platform/lib/mailbox.h‎

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/* SPDX-License-Identifier: BSD-3-Clause */
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/*
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* Copyright(c) 2024 MediaTek. All rights reserved.
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*
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* Author: Andrew Perepech <andrew.perepech@mediatek.com>
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*/
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#ifdef __SOF_LIB_MAILBOX_H__
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#ifndef __PLATFORM_LIB_MAILBOX_H__
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#define __PLATFORM_LIB_MAILBOX_H__
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#include <sof/lib/memory.h>
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#include <stddef.h>
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#include <stdint.h>
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/*
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* The Window Region on MT8365 SRAM is organised like this :-
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* +--------------------------------------------------------------------------+
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* | Offset | Region | Size |
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* +---------------------+----------------+-----------------------------------+
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* | SRAM_TRACE_BASE | Trace Buffer | SRAM_TRACE_SIZE |
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* +---------------------+----------------+-----------------------------------+
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* | SRAM_DEBUG_BASE | Debug data | SRAM_DEBUG_SIZE |
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* +---------------------+----------------+-----------------------------------+
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* | SRAM_INBOX_BASE | Inbox | SRAM_INBOX_SIZE |
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* +---------------------+----------------+-----------------------------------+
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* | SRAM_OUTBOX_BASE | Outbox | SRAM_MAILBOX_SIZE |
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* +---------------------+----------------+-----------------------------------+
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*/
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#define MAILBOX_DSPBOX_SIZE SRAM_OUTBOX_SIZE
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#define MAILBOX_DSPBOX_BASE SRAM_OUTBOX_BASE
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#define MAILBOX_DSPBOX_OFFSET SRAM_OUTBOX_OFFSET
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#define MAILBOX_HOSTBOX_SIZE SRAM_INBOX_SIZE
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#define MAILBOX_HOSTBOX_BASE SRAM_INBOX_BASE
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#define MAILBOX_HOSTBOX_OFFSET SRAM_INBOX_OFFSET
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#define MAILBOX_DEBUG_SIZE SRAM_DEBUG_SIZE
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#define MAILBOX_DEBUG_BASE SRAM_DEBUG_BASE
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#define MAILBOX_DEBUG_OFFSET SRAM_DEBUG_OFFSET
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#define MAILBOX_TRACE_SIZE SRAM_TRACE_SIZE
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#define MAILBOX_TRACE_BASE SRAM_TRACE_BASE
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#define MAILBOX_TRACE_OFFSET SRAM_TRACE_OFFSET
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#define MAILBOX_EXCEPTION_SIZE SRAM_EXCEPT_SIZE
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#define MAILBOX_EXCEPTION_BASE SRAM_EXCEPT_BASE
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#define MAILBOX_EXCEPTION_OFFSET SRAM_EXCEPT_OFFSET
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#define MAILBOX_STREAM_SIZE SRAM_STREAM_SIZE
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#define MAILBOX_STREAM_BASE SRAM_STREAM_BASE
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#define MAILBOX_STREAM_OFFSET SRAM_STREAM_OFFSET
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static inline void mailbox_sw_reg_write(size_t offset, uint32_t src)
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{
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volatile uint32_t *ptr;
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ptr = (volatile uint32_t *)(MAILBOX_DEBUG_BASE + offset);
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*ptr = src;
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}
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static inline uint32_t mailbox_sw_reg_read(size_t offset)
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{
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volatile uint32_t *ptr;
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ptr = (volatile uint32_t *)(MAILBOX_DEBUG_BASE + offset);
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return *ptr;
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}
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#define ADSP_IPI_OP_REQ 0x1
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#define ADSP_IPI_OP_RSP 0x2
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void trigger_irq_to_host_req(void);
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void trigger_irq_to_host_rsp(void);
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#endif /* __PLATFORM_LIB_MAILBOX_H__ */
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#else
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#error "This file shouldn't be included from outside of sof/lib/mailbox.h"
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#endif /* __SOF_LIB_MAILBOX_H__ */

‎src/platform/mt8365/include/platform/lib/pm_runtime.h‎

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/* SPDX-License-Identifier: BSD-3-Clause */
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/*
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* Copyright(c) 2024 MediaTek. All rights reserved.
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*
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* Author: Andrew Perepech <andrew.perepech@mediatek.com>
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*/
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#ifdef __SOF_LIB_PM_RUNTIME_H__
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#ifndef __PLATFORM_LIB_PM_RUNTIME_H__
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#define __PLATFORM_LIB_PM_RUNTIME_H__
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#include <stdint.h>
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struct pm_runtime_data;
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/**
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* \brief Initializes platform specific runtime power management.
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* \param[in,out] prd Runtime power management data.
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*/
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static inline void platform_pm_runtime_init(struct pm_runtime_data *prd)
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{
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}
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/**
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* \brief Retrieves platform specific power management resource.
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*
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* \param[in] context Type of power management context.
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* \param[in] index Index of the device.
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* \param[in] flags Flags, set of RPM_...
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*/
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static inline void platform_pm_runtime_get(uint32_t context, uint32_t index, uint32_t flags)
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{
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}
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/**
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* \brief Releases platform specific power management resource.
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*
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* \param[in] context Type of power management context.
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* \param[in] index Index of the device.
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* \param[in] flags Flags, set of RPM_...
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*/
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static inline void platform_pm_runtime_put(uint32_t context, uint32_t index, uint32_t flags)
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{
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}
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static inline void platform_pm_runtime_enable(uint32_t context, uint32_t index)
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{
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}
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static inline void platform_pm_runtime_disable(uint32_t context, uint32_t index)
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{
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}
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static inline bool platform_pm_runtime_is_active(uint32_t context, uint32_t index)
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{
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return false;
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}
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#endif /* __PLATFORM_LIB_PM_RUNTIME_H__ */
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#else
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#error "This file shouldn't be included from outside of sof/lib/pm_runtime.h"
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#endif /* __SOF_LIB_PM_RUNTIME_H__ */

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