dma: fix dma issue on BYT

It is caused by the change of removing dai waiting after stop.
dma should not be stopped in dai_comp_trigger if HW LLI is not
enable. At this time DMA is still working and it can't be stopped
DMA engine would stop the channel automatically after each transfer.
So just query channel status to stop dma on BYT

Signed-off-by: Pan Xiuli <xiuli.pan@linux.intel.com>
Signed-off-by: Rander Wang <rander.wang@linux.intel.com>

Author: RanderWang

src/drivers/intel/dw-dma.c

@@ -120,6 +120,7 @@
 #define INT_UNMASK_ALL			0xFFFF
 #define CHAN_ENABLE(chan)		(0x101 << chan)
 #define CHAN_DISABLE(chan)		(0x100 << chan)
+#define CHAN_MASK(chan)		(0x1 << chan)
 
 #define DW_CFG_CH_SUSPEND		0x100
 #define DW_CFG_CH_FIFO_EMPTY		0x200
@@ -491,6 +492,31 @@ static int dw_dma_pause(struct dma *dma, int channel)
 	return 0;
 }
 
+#if defined CONFIG_BAYTRAIL || defined CONFIG_CHERRYTRAIL
+static int dw_dma_stop(struct dma *dma, int channel)
+{
+	struct dma_pdata *p = dma_get_drvdata(dma);
+	int ret = 0;
+	uint32_t flags;
+	uint32_t val = 0;
+
+	spin_lock_irq(&dma->lock, flags);
+
+	trace_dma("DDi");
+
+	ret = poll_for_register_delay(dma_base(dma) + DW_DMA_CHAN_EN,
+				      CHAN_MASK(channel), val,
+				      PLATFORM_DMA_TIMEOUT);
+	if (ret < 0)
+		trace_dma_error("esp");
+
+	dw_write(dma, DW_CLEAR_BLOCK, 0x1 << channel);
+	p->chan[channel].status = COMP_STATE_PREPARE;
+
+	spin_unlock_irq(&dma->lock, flags);
+	return ret;
+}
+#else
 static int dw_dma_stop(struct dma *dma, int channel)
 {
 	struct dma_pdata *p = dma_get_drvdata(dma);
@@ -528,6 +554,7 @@ static int dw_dma_stop(struct dma *dma, int channel)
 	spin_unlock_irq(&dma->lock, flags);
 	return ret;
 }
+#endif
 
 /* fill in "status" with current DMA channel state and position */
 static int dw_dma_status(struct dma *dma, int channel,