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Math: IIR DF1: Add a simplified 4th order IIR process function
The 4th filter with two biquads in series is commonly used in crossover and multiband DRC components. The omitting of outer loop for parallel biquads and check for null coefficients and use of fixed loop count of two makes the critical code faster. Signed-off-by: Seppo Ingalsuo <seppo.ingalsuo@linux.intel.com>
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‎src/include/sof/math/iir_df1.h‎

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@@ -13,6 +13,7 @@
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#include <sof/common.h>
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#define IIR_DF1_NUM_STATE 4
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#define SOF_IIR_DF1_4TH_NUM_BIQUADS 2
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struct iir_state_df1 {
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unsigned int biquads; /* Number of IIR 2nd order sections total */
@@ -34,8 +35,24 @@ void iir_init_delay_df1(struct iir_state_df1 *iir, int32_t **state);
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void iir_reset_df1(struct iir_state_df1 *iir);
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/**
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* Calculate IIR filter consisting of biquads
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* @param iir IIR state with configured biquad coefficients and delay lines data
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* @param x Single s32 Q1.31 format input sample
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* @return Single s32 Q1.31 format output samples
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*/
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int32_t iir_df1(struct iir_state_df1 *iir, int32_t x);
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/**
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* Calculate IIR filter consisting of biquads, special simplified version for
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* 4th order filter with two biquads in series. Note: There are no checks for
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* iir struct members.
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* @param iir IIR state with configured biquad coefficients and delay lines data
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* @param x Single s32 Q1.31 format input sample
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* @return Single s32 Q1.31 format output samples
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*/
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int32_t iir_df1_4th(struct iir_state_df1 *iir, int32_t x);
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/* Inline functions */
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#if SOF_USE_MIN_HIFI(3, FILTER)
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#include "iir_df1_hifi3.h"

‎src/math/iir_df1_generic.c‎

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@@ -109,4 +109,58 @@ int32_t iir_df1(struct iir_state_df1 *iir, int32_t x)
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}
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EXPORT_SYMBOL(iir_df1);
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int32_t iir_df1_4th(struct iir_state_df1 *iir, int32_t x)
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{
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int32_t in;
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int32_t tmp;
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int64_t acc;
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int i;
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int d = 0; /* Index to state */
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int c = 0; /* Index to coefficient a2 */
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int32_t *coefp = iir->coef;
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int32_t *delay = iir->delay;
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/* Coefficients order in coef[] is {a2, a1, b2, b1, b0, shift, gain} */
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/* Delay order in state[] is {y(n - 2), y(n - 1), x(n - 2), x(n - 1)} */
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in = x;
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for (i = 0; i < SOF_IIR_DF1_4TH_NUM_BIQUADS; i++) {
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/* Compute output: Delay is Q3.61
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* Q2.30 x Q1.31 -> Q3.61
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* Shift Q3.61 to Q3.31 with rounding, saturate to Q1.31
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*/
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acc = ((int64_t)coefp[c]) * delay[d]; /* a2 * y(n - 2) */
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acc += ((int64_t)coefp[c + 1]) * delay[d + 1]; /* a1 * y(n - 1) */
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acc += ((int64_t)coefp[c + 2]) * delay[d + 2]; /* b2 * x(n - 2) */
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acc += ((int64_t)coefp[c + 3]) * delay[d + 3]; /* b1 * x(n - 1) */
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acc += ((int64_t)coefp[c + 4]) * in; /* b0 * x */
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tmp = (int32_t)sat_int32(Q_SHIFT_RND(acc, 61, 31));
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/* update the delay value */
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delay[d] = delay[d + 1];
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delay[d + 1] = tmp;
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delay[d + 2] = delay[d + 3];
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delay[d + 3] = in;
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/* Apply gain Q2.14 x Q1.31 -> Q3.45 */
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acc = ((int64_t)coefp[c + 6]) * tmp; /* Gain */
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/* Apply biquad output shift right parameter
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* simultaneously with Q3.45 to Q3.31 conversion. Then
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* saturate to 32 bits Q1.31 and prepare for next
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* biquad.
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*/
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acc = Q_SHIFT_RND(acc, 45 + coefp[c + 5], 31);
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in = sat_int32(acc);
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/* Proceed to next biquad coefficients and delay
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* lines.
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*/
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c += SOF_EQ_IIR_NBIQUAD;
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d += IIR_DF1_NUM_STATE;
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}
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/* Output of previous section is in variable in */
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return in;
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}
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EXPORT_SYMBOL(iir_df1_4th);
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#endif

‎src/math/iir_df1_hifi3.c‎

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@@ -126,4 +126,72 @@ int32_t iir_df1(struct iir_state_df1 *iir, int32_t x)
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}
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EXPORT_SYMBOL(iir_df1);
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int32_t iir_df1_4th(struct iir_state_df1 *iir, int32_t x)
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{
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ae_int64 acc;
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ae_valign coef_align;
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ae_int32x2 coef_a2a1;
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ae_int32x2 coef_b2b1;
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ae_int32x2 coef_b0;
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ae_int32x2 gain;
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ae_int32x2 shift;
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ae_int32x2 delay_y2y1;
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ae_int32x2 delay_x2x1;
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ae_int32 in;
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ae_int32 tmp;
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ae_int32x2 *coefp;
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ae_int32x2 *delayp;
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int32_t *delay_update;
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int i;
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/* Coefficients order in coef[] is {a2, a1, b2, b1, b0, shift, gain} */
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coefp = (ae_int32x2 *)&iir->coef[0];
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delayp = (ae_int32x2 *)&iir->delay[0];
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in = x;
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for (i = 0; i < SOF_IIR_DF1_4TH_NUM_BIQUADS; i++) {
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/* Compute output: Delay is kept Q17.47 while multiply
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* instruction gives Q2.30 x Q1.31 -> Q18.46. Need to
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* shift delay line values right by one for same align
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* as MAC. Store to delay line need to be shifted left
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* by one similarly.
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*/
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coef_align = AE_LA64_PP(coefp);
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AE_LA32X2_IP(coef_a2a1, coef_align, coefp);
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AE_LA32X2_IP(coef_b2b1, coef_align, coefp);
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AE_L32_IP(coef_b0, (ae_int32 *)coefp, 4);
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AE_L32_IP(shift, (ae_int32 *)coefp, 4);
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AE_L32_IP(gain, (ae_int32 *)coefp, 4);
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AE_L32X2_IP(delay_y2y1, delayp, 8);
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AE_L32X2_IP(delay_x2x1, delayp, 8);
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acc = AE_MULF32R_HH(coef_a2a1, delay_y2y1); /* a2 * y(n - 2) */
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AE_MULAF32R_LL(acc, coef_a2a1, delay_y2y1); /* a1 * y(n - 1) */
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AE_MULAF32R_HH(acc, coef_b2b1, delay_x2x1); /* b2 * x(n - 2) */
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AE_MULAF32R_LL(acc, coef_b2b1, delay_x2x1); /* b1 * x(n - 1) */
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AE_MULAF32R_HH(acc, coef_b0, in); /* b0 * x */
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acc = AE_SLAI64S(acc, 1); /* Convert to Q17.47 */
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tmp = AE_ROUND32F48SSYM(acc); /* Round to Q1.31 */
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/* update the state value */
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delay_update = (int32_t *)delayp - 4;
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delay_update[0] = delay_update[1];
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delay_update[1] = tmp;
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delay_update[2] = delay_update[3];
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delay_update[3] = in;
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/* Apply gain Q18.14 x Q1.31 -> Q34.30 */
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acc = AE_MULF32R_HH(gain, tmp); /* Gain */
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acc = AE_SLAI64S(acc, 17); /* Convert to Q17.47 */
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/* Apply biquad output shift right parameter and then
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* round and saturate to 32 bits Q1.31.
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*/
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acc = AE_SRAA64(acc, shift);
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in = AE_ROUND32F48SSYM(acc);
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}
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return in;
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}
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EXPORT_SYMBOL(iir_df1_4th);
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#endif

‎src/math/iir_df1_hifi4.c‎

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@@ -119,4 +119,65 @@ int32_t iir_df1(struct iir_state_df1 *iir, int32_t x)
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}
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EXPORT_SYMBOL(iir_df1);
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int32_t iir_df1_4th(struct iir_state_df1 *iir, int32_t x)
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{
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ae_valign coef_align;
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ae_valign data_r_align;
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ae_valign data_w_align = AE_ZALIGN64();
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ae_f64 acc;
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ae_int32x2 delay_y2y1;
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ae_int32x2 delay_x2x1;
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ae_int32x2 coef_a2a1;
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ae_int32x2 coef_b2b1;
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ae_int32x2 coef_b0;
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ae_int32x2 gain;
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ae_int32x2 shift;
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ae_int32 in;
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ae_int32x2 *coefp = (ae_int32x2 *)iir->coef;
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ae_int32x2 *delay_r = (ae_int32x2 *)iir->delay;
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ae_int32x2 *delay_w = delay_r;
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int i;
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/* Coefficients order in coef[] is {a2, a1, b2, b1, b0, shift, gain} */
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/* Delay order in state[] is {y(n - 2), y(n - 1), x(n - 2), x(n - 1)} */
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data_r_align = AE_LA64_PP(delay_r);
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in = x;
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for (i = 0; i < SOF_IIR_DF1_4TH_NUM_BIQUADS; i++) {
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/* Load data */
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AE_LA32X2_IP(delay_y2y1, data_r_align, delay_r);
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AE_LA32X2_IP(delay_x2x1, data_r_align, delay_r);
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/* Load coefficients */
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coef_align = AE_LA64_PP(coefp);
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AE_LA32X2_IP(coef_a2a1, coef_align, coefp);
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AE_LA32X2_IP(coef_b2b1, coef_align, coefp);
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AE_L32_IP(coef_b0, (ae_int32 *)coefp, 4);
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AE_L32_IP(shift, (ae_int32 *)coefp, 4);
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AE_L32_IP(gain, (ae_int32 *)coefp, 4);
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acc = AE_MULF32RA_HH(coef_b0, in); /* acc = b0 * in */
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AE_MULAAFD32RA_HH_LL(acc, coef_a2a1, delay_y2y1); /* + a2 * y2 + a1 * y1 */
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AE_MULAAFD32RA_HH_LL(acc, coef_b2b1, delay_x2x1); /* + b2 * x2 + b1 * x1 */
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AE_PKSR32(delay_y2y1, acc, 1); /* y2 = y1, y1 = acc(q1.31) */
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delay_x2x1 = AE_SEL32_LL(delay_x2x1, in); /* x2 = x1, x1 = in */
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/* Store data */
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AE_SA32X2_IP(delay_y2y1, data_w_align, delay_w);
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AE_SA32X2_IP(delay_x2x1, data_w_align, delay_w);
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/* Apply gain */
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acc = AE_MULF32R_LL(gain, delay_y2y1); /* acc = gain * y1 */
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acc = AE_SLAI64S(acc, 17); /* Convert to Q17.47 */
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/* Apply biquad output shift right parameter and then
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* round and saturate to 32 bits Q1.31.
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*/
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acc = AE_SRAA64(acc, shift);
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in = AE_ROUND32F48SSYM(acc);
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}
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AE_SA64POS_FP(data_w_align, delay_w);
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return in;
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}
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EXPORT_SYMBOL(iir_df1_4th);
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#endif

‎src/math/iir_df1_hifi5.c‎

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@@ -116,4 +116,63 @@ int32_t iir_df1(struct iir_state_df1 *iir, int32_t x)
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}
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EXPORT_SYMBOL(iir_df1);
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int32_t iir_df1_4th(struct iir_state_df1 *iir, int32_t x)
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{
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ae_valignx2 coef_align;
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ae_valignx2 data_r_align;
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ae_valignx2 data_w_align = AE_ZALIGN128();
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ae_f64 acc;
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ae_int32x2 delay_y2y1;
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ae_int32x2 delay_x2x1;
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ae_int32x2 coef_a2a1;
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ae_int32x2 coef_b2b1;
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ae_int32x2 coef_b0;
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ae_int32x2 gain;
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ae_int32x2 shift;
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ae_int32 in;
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ae_int32x4 *coefp = (ae_int32x4 *)iir->coef;
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ae_int32x4 *delay_r = (ae_int32x4 *)iir->delay;
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ae_int32x4 *delay_w = delay_r;
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int i;
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/* Coefficients order in coef[] is {a2, a1, b2, b1, b0, shift, gain} */
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/* Delay order in state[] is {y(n - 2), y(n - 1), x(n - 2), x(n - 1)} */
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data_r_align = AE_LA128_PP(delay_r);
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in = x;
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for (i = 0; i < SOF_IIR_DF1_4TH_NUM_BIQUADS; i++) {
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/* Load data */
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AE_LA32X2X2_IP(delay_y2y1, delay_x2x1, data_r_align, delay_r);
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/* Load coefficients */
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coef_align = AE_LA128_PP(coefp);
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AE_LA32X2X2_IP(coef_a2a1, coef_b2b1, coef_align, coefp);
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AE_L32_IP(coef_b0, (ae_int32 *)coefp, 4);
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AE_L32_IP(shift, (ae_int32 *)coefp, 4);
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AE_L32_IP(gain, (ae_int32 *)coefp, 4);
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acc = AE_MULF32RA_HH(coef_b0, in); /* acc = b0 * in */
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AE_MULAAFD32RA_HH_LL(acc, coef_a2a1, delay_y2y1); /* + a2 * y2 + a1 * y1 */
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AE_MULAAFD32RA_HH_LL(acc, coef_b2b1, delay_x2x1); /* + b2 * x2 + b1 * x1 */
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AE_PKSR32(delay_y2y1, acc, 1); /* y2 = y1, y1 = acc(q1.31) */
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delay_x2x1 = AE_SEL32_LL(delay_x2x1, in); /* x2 = x1, x1 = in */
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/* Store data */
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AE_SA32X2X2_IP(delay_y2y1, delay_x2x1, data_w_align, delay_w);
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/* Apply gain */
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acc = AE_MULF32R_LL(gain, delay_y2y1); /* acc = gain * y1 */
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acc = AE_SLAI64S(acc, 17); /* Convert to Q17.47 */
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/* Apply biquad output shift right parameter and then
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* round and saturate to 32 bits Q1.31.
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*/
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acc = AE_SRAA64(acc, shift);
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in = AE_ROUND32F48SSYM(acc);
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}
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AE_SA128POS_FP(data_w_align, delay_w);
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return in;
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}
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EXPORT_SYMBOL(iir_df1_4th);
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#endif

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