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Save interpreter r_ip into the frame (to protect against div)
1 parent 0013e3d commit 6b89ddf

2 files changed

Lines changed: 13 additions & 3 deletions

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src/engine/compiler/SinglePassCompiler.v3

Lines changed: 10 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -374,7 +374,14 @@ class SinglePassCompiler(xenv: SpcExecEnv, masm: MacroAssembler, regAlloc: RegAl
374374
masm.emit_mov_m_l(frame.inlined_instance_slot, 0);
375375
}
376376
} else {
377-
masm.emit_addw_r_i(X86_64MasmRegs.INT_EXEC_ENV.ip, uleb_size(func.func_index));
377+
// Advance IP past the fast-call opcode and spill it
378+
def r_ip = X86_64MasmRegs.INT_EXEC_ENV.ip;
379+
def ip_slot = X86_64MasmRegs.INT_EXEC_ENV.ip_slot;
380+
masm.emit_addw_r_i(r_ip, uleb_size(func.func_index));
381+
masm.emit_mov_m_r(ValueKind.REF, ip_slot, r_ip);
382+
// XXX why do we have to spill? because div will clobber rax
383+
// In a single pass, we don't know at this point if a div will be used
384+
// add as a property picked up during validation?
378385
}
379386

380387
// Compute VFP = VSP - sig.params.length * SLOT_SIZE
@@ -2782,7 +2789,8 @@ class SinglePassCompiler(xenv: SpcExecEnv, masm: MacroAssembler, regAlloc: RegAl
27822789
return !isInlined() || ctl_base_sp == 0;
27832790
}
27842791
def inlineDepth() -> int {
2785-
return state.frame_stack.top - 1;
2792+
// subtract extra 1 in the fastcall case
2793+
return if(fast, state.frame_stack.top - 2, state.frame_stack.top - 1);
27862794
}
27872795
def snapshotFrames() -> Array<SpcFrame> {
27882796
var frames = Array<SpcFrame>.new(state.frame_stack.top);

src/engine/x86-64/X86_64SinglePassCompiler.v3

Lines changed: 3 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -85,7 +85,9 @@ class X86_64SinglePassCompiler extends SinglePassCompiler {
8585
mmasm.trap_stubs = TRAPS_STUB;
8686
}
8787
def emitFastDispatch() {
88-
mmasm.emit_int_dispatch(r_tmp0, r_tmp1, r_ip, r_dispatch, ip_ptr,
88+
// XXX Restore IP from the interpreter frame slot
89+
asm.movq_r_m(r_ip, m_ip);
90+
mmasm.emit_int_dispatch(r_tmp0, r_tmp1, r_ip, r_dispatch, ip_ptr,
8991
if(ic != null, IcCodeRef.new(ic.header.fastDispatchTableOffset)), true, ic);
9092
}
9193
private def saveIVar(r: X86_64Gpr) {

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