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[TPDE,LLVM] Make LLVM 21 the default version
1 parent f337243 commit 6ca9d23

64 files changed

Lines changed: 1287 additions & 698 deletions

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‎CMakeLists.txt‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -112,7 +112,7 @@ if (TPDE_ENABLE_ENCODEGEN OR TPDE_ENABLE_LLVM)
112112
# LLVM versions we currently support. The first version should be the
113113
# "primary" versions where all tests pass (i.e., no XFAIL due to different
114114
# code generation).
115-
set(TPDE_LLVM_SUPPORTED_VERSIONS 20.1 19.1)
115+
set(TPDE_LLVM_SUPPORTED_VERSIONS 21.1 20.1 19.1)
116116

117117
# allow overriding the LLVM version used
118118
if (DEFINED LLVM_DIR)

‎tpde-llvm/src/LLVMCompilerBase.hpp‎

Lines changed: 13 additions & 15 deletions
Original file line numberDiff line numberDiff line change
@@ -4925,7 +4925,7 @@ bool LLVMCompilerBase<Adaptor, Derived, Config>::compile_intrin(
49254925
using EncodeFnTy = bool (Derived::*)(GenericValuePart &&, ValuePart &&);
49264926
static constexpr EncodeFnTy encode_fns[4][2][2] = {
49274927
#define F(n, op, suffix) &Derived::encode_##op##i##n##suffix
4928-
{ {F(8, ctlz, ), F(8, ctlz, _zp)}, {F(8, cttz, ), F(32, cttz, _zp)}},
4928+
{{F(8, ctlz, ), F(8, ctlz, _zp)}, {F(8, cttz, ), F(32, cttz, _zp)}},
49294929
{{F(16, ctlz, ), F(16, ctlz, _zp)}, {F(16, cttz, ), F(32, cttz, _zp)}},
49304930
{{F(32, ctlz, ), F(32, ctlz, _zp)}, {F(32, cttz, ), F(32, cttz, _zp)}},
49314931
{{F(64, ctlz, ), F(64, ctlz, _zp)}, {F(64, cttz, ), F(64, cttz, _zp)}},
@@ -5164,32 +5164,31 @@ bool LLVMCompilerBase<Adaptor, Derived, Config>::compile_overflow_intrin(
51645164
GenericValuePart &&, GenericValuePart &&, ValuePart &&, ValuePart &&);
51655165
std::array<std::array<EncodeFnTy, 4>, 6> encode_fns = {
51665166
{
5167-
{&Derived::encode_of_add_u8,
5167+
{&Derived::encode_of_add_u8,
51685168
&Derived::encode_of_add_u16,
51695169
&Derived::encode_of_add_u32,
51705170
&Derived::encode_of_add_u64},
5171-
{&Derived::encode_of_add_i8,
5171+
{&Derived::encode_of_add_i8,
51725172
&Derived::encode_of_add_i16,
51735173
&Derived::encode_of_add_i32,
51745174
&Derived::encode_of_add_i64},
5175-
{&Derived::encode_of_sub_u8,
5175+
{&Derived::encode_of_sub_u8,
51765176
&Derived::encode_of_sub_u16,
51775177
&Derived::encode_of_sub_u32,
51785178
&Derived::encode_of_sub_u64},
5179-
{&Derived::encode_of_sub_i8,
5179+
{&Derived::encode_of_sub_i8,
51805180
&Derived::encode_of_sub_i16,
51815181
&Derived::encode_of_sub_i32,
51825182
&Derived::encode_of_sub_i64},
5183-
{&Derived::encode_of_mul_u8,
5183+
{&Derived::encode_of_mul_u8,
51845184
&Derived::encode_of_mul_u16,
51855185
&Derived::encode_of_mul_u32,
51865186
&Derived::encode_of_mul_u64},
5187-
{&Derived::encode_of_mul_i8,
5187+
{&Derived::encode_of_mul_i8,
51885188
&Derived::encode_of_mul_i16,
51895189
&Derived::encode_of_mul_i32,
51905190
&Derived::encode_of_mul_i64},
5191-
}
5192-
};
5191+
}};
51935192

51945193
EncodeFnTy encode_fn = encode_fns[static_cast<u32>(op)][width_idx];
51955194
(derived()->*encode_fn)(lhs.part(0), rhs.part(0), res.part(0), res.part(1));
@@ -5218,24 +5217,23 @@ bool LLVMCompilerBase<Adaptor, Derived, Config>::compile_saturating_intrin(
52185217
bool (Derived::*)(GenericValuePart &&, GenericValuePart &&, ValuePart &&);
52195218
std::array<std::array<EncodeFnTy, 4>, 4> encode_fns{
52205219
{
5221-
{&Derived::encode_sat_add_u8,
5220+
{&Derived::encode_sat_add_u8,
52225221
&Derived::encode_sat_add_u16,
52235222
&Derived::encode_sat_add_u32,
52245223
&Derived::encode_sat_add_u64},
5225-
{&Derived::encode_sat_add_i8,
5224+
{&Derived::encode_sat_add_i8,
52265225
&Derived::encode_sat_add_i16,
52275226
&Derived::encode_sat_add_i32,
52285227
&Derived::encode_sat_add_i64},
5229-
{&Derived::encode_sat_sub_u8,
5228+
{&Derived::encode_sat_sub_u8,
52305229
&Derived::encode_sat_sub_u16,
52315230
&Derived::encode_sat_sub_u32,
52325231
&Derived::encode_sat_sub_u64},
5233-
{&Derived::encode_sat_sub_i8,
5232+
{&Derived::encode_sat_sub_i8,
52345233
&Derived::encode_sat_sub_i16,
52355234
&Derived::encode_sat_sub_i32,
52365235
&Derived::encode_sat_sub_i64},
5237-
}
5238-
};
5236+
}};
52395237

52405238
EncodeFnTy encode_fn = encode_fns[static_cast<u32>(op)][width_idx];
52415239

‎tpde-llvm/test/filetest/alloca.ll‎

Lines changed: 20 additions & 9 deletions
Original file line numberDiff line numberDiff line change
@@ -5,6 +5,8 @@
55

66
; RUN: tpde-llc --target=x86_64 %s | %objdump | FileCheck %s -check-prefixes=X64
77
; RUN: tpde-llc --target=aarch64 %s | %objdump | FileCheck %s -check-prefixes=ARM64
8+
; XFAIL: llvm19.1
9+
; XFAIL: llvm20.1
810

911

1012
define ptr @alloca_empty() {
@@ -806,7 +808,8 @@ define void @alloca_4k() {
806808
; ARM64-NEXT: stp x29, x30, [sp]
807809
; ARM64-NEXT: mov x29, sp
808810
; ARM64-NEXT: add x0, x29, #0xa0
809-
; ARM64-NEXT: bl 0x480 <alloca_4k+0x10>
811+
; ARM64-NEXT: <L0>:
812+
; ARM64-NEXT: bl <L0>
810813
; ARM64-NEXT: R_AARCH64_CALL26 take_ptr
811814
; ARM64-NEXT: ldp x29, x30, [sp]
812815
; ARM64-NEXT: add sp, sp, #0x2, lsl #12 // =0x2000
@@ -836,7 +839,8 @@ define void @dyn_alloca_4k() {
836839
; ARM64-NEXT: mov x29, sp
837840
; ARM64-NEXT: sub x0, sp, #0x1, lsl #12 // =0x1000
838841
; ARM64-NEXT: mov sp, x0
839-
; ARM64-NEXT: bl 0x4a0 <dyn_alloca_4k+0x10>
842+
; ARM64-NEXT: <L0>:
843+
; ARM64-NEXT: bl <L0>
840844
; ARM64-NEXT: R_AARCH64_CALL26 take_ptr
841845
; ARM64-NEXT: mov sp, x29
842846
; ARM64-NEXT: ldp x29, x30, [sp], #0xa0
@@ -866,7 +870,8 @@ define void @alloca_32k() {
866870
; ARM64-NEXT: stp x29, x30, [sp]
867871
; ARM64-NEXT: mov x29, sp
868872
; ARM64-NEXT: add x0, x29, #0xa0
869-
; ARM64-NEXT: bl 0x4c0 <alloca_32k+0x10>
873+
; ARM64-NEXT: <L0>:
874+
; ARM64-NEXT: bl <L0>
870875
; ARM64-NEXT: R_AARCH64_CALL26 take_ptr
871876
; ARM64-NEXT: ldp x29, x30, [sp]
872877
; ARM64-NEXT: add sp, sp, #0x9, lsl #12 // =0x9000
@@ -896,7 +901,8 @@ define void @dyn_alloca_32k() {
896901
; ARM64-NEXT: mov x29, sp
897902
; ARM64-NEXT: sub x0, sp, #0x8, lsl #12 // =0x8000
898903
; ARM64-NEXT: mov sp, x0
899-
; ARM64-NEXT: bl 0x4e0 <dyn_alloca_32k+0x10>
904+
; ARM64-NEXT: <L0>:
905+
; ARM64-NEXT: bl <L0>
900906
; ARM64-NEXT: R_AARCH64_CALL26 take_ptr
901907
; ARM64-NEXT: mov sp, x29
902908
; ARM64-NEXT: ldp x29, x30, [sp], #0xa0
@@ -929,7 +935,8 @@ define void @dyn_alloca_33k() {
929935
; ARM64-NEXT: sub x0, sp, #0x8, lsl #12 // =0x8000
930936
; ARM64-NEXT: sub x0, x0, #0x400
931937
; ARM64-NEXT: mov sp, x0
932-
; ARM64-NEXT: bl 0x504 <dyn_alloca_33k+0x14>
938+
; ARM64-NEXT: <L0>:
939+
; ARM64-NEXT: bl <L0>
933940
; ARM64-NEXT: R_AARCH64_CALL26 take_ptr
934941
; ARM64-NEXT: mov sp, x29
935942
; ARM64-NEXT: ldp x29, x30, [sp], #0xa0
@@ -960,7 +967,8 @@ define void @alloca_16M() {
960967
; ARM64-NEXT: mov x16, #0x1000000 // =16777216
961968
; ARM64-NEXT: sub x0, sp, x16
962969
; ARM64-NEXT: mov sp, x0
963-
; ARM64-NEXT: bl 0x534 <alloca_16M+0x14>
970+
; ARM64-NEXT: <L0>:
971+
; ARM64-NEXT: bl <L0>
964972
; ARM64-NEXT: R_AARCH64_CALL26 take_ptr
965973
; ARM64-NEXT: mov sp, x29
966974
; ARM64-NEXT: ldp x29, x30, [sp], #0xa0
@@ -991,7 +999,8 @@ define void @dyn_alloca_16M() {
991999
; ARM64-NEXT: mov x16, #0x1000000 // =16777216
9921000
; ARM64-NEXT: sub x0, sp, x16
9931001
; ARM64-NEXT: mov sp, x0
994-
; ARM64-NEXT: bl 0x564 <dyn_alloca_16M+0x14>
1002+
; ARM64-NEXT: <L0>:
1003+
; ARM64-NEXT: bl <L0>
9951004
; ARM64-NEXT: R_AARCH64_CALL26 take_ptr
9961005
; ARM64-NEXT: mov sp, x29
9971006
; ARM64-NEXT: ldp x29, x30, [sp], #0xa0
@@ -1257,7 +1266,8 @@ define void @f2(ptr %0, ptr %1, ptr %2, ptr %3, ptr %4, ptr %5, ptr %6, ptr %7,
12571266
; ARM64-NEXT: str x8, [sp, #0x100]
12581267
; ARM64-NEXT: str x28, [sp, #0x108]
12591268
; ARM64-NEXT: str x30, [sp, #0x110]
1260-
; ARM64-NEXT: bl 0x750 <f2+0x1d0>
1269+
; ARM64-NEXT: <L0>:
1270+
; ARM64-NEXT: bl <L0>
12611271
; ARM64-NEXT: R_AARCH64_CALL26 f1
12621272
; ARM64-NEXT: add sp, sp, #0x120
12631273
; ARM64-NEXT: ldp x19, x20, [sp, #0x10]
@@ -1461,6 +1471,7 @@ define void @alloca_manyregs(i32 %0, ptr %1, ptr %2, ptr %3, i64 %4, i32 %5, ptr
14611471
; ARM64-NEXT: mov w8, #0x0 // =0
14621472
; ARM64-NEXT: add x16, x29, #0x40, lsl #12 // =0x40000
14631473
; ARM64-NEXT: str w8, [x16, #0x898]
1474+
; ARM64-NEXT: <L0>:
14641475
; ARM64-NEXT: add x0, x29, #0x40, lsl #12 // =0x40000
14651476
; ARM64-NEXT: ldr x0, [x0, #0x7f8]
14661477
; ARM64-NEXT: add x1, x29, #0x40, lsl #12 // =0x40000
@@ -1553,7 +1564,7 @@ define void @alloca_manyregs(i32 %0, ptr %1, ptr %2, ptr %3, i64 %4, i32 %5, ptr
15531564
; ARM64-NEXT: orr w30, w30, w0
15541565
; ARM64-NEXT: add x16, x29, #0x40, lsl #12 // =0x40000
15551566
; ARM64-NEXT: str w14, [x16, #0x898]
1556-
; ARM64-NEXT: b 0x8d4 <alloca_manyregs+0x154>
1567+
; ARM64-NEXT: b <L0>
15571568
%23 = alloca [66000 x i32], align 4
15581569
br label %24
15591570

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