pvm: Switch PVCS on updating MSR_GS_BASE

Signed-off-by: Lai Jiangshan <jiangshan.ljs@antgroup.com>

Author: Lai Jiangshan

arch/x86/include/asm/pvm_para.h

@@ -15,7 +15,6 @@ typedef void (*idtentry_t)(struct pt_regs *regs);
 void __init pvm_early_setup(void);
 void __init pvm_setup_early_traps(void);
 void __init pvm_install_sysvec(unsigned int sysvec, idtentry_t handler);
-void __init pvm_switch_pvcs(int cpu);
 void pvm_setup_event_handling(void);
 bool __init pvm_kernel_layout_relocate(void);
 
@@ -81,10 +80,6 @@ static inline void pvm_install_sysvec(unsigned int sysvec, idtentry_t handler)
 {
 }
 
-static inline void pvm_switch_pvcs(int cpu)
-{
-}
-
 static inline void pvm_setup_event_handling(void)
 {
 }

arch/x86/kernel/cpu/common.c

@@ -753,7 +753,6 @@ void __init switch_gdt_and_percpu_base(int cpu)
 	 * per CPU stack canary is 0 in both per CPU areas.
 	 */
 	wrmsrl(MSR_GS_BASE, cpu_kernelmode_gs_base(cpu));
-	pvm_switch_pvcs(cpu);
 #else
 	/*
 	 * %fs is already set to __KERNEL_PERCPU, but after switching GDT

arch/x86/kernel/pvm.c

@@ -118,6 +118,7 @@ static unsigned long long pvm_read_msr(unsigned int msr)
 static int notrace pvm_write_msr_safe(unsigned int msr, u32 low, u32 high)
 {
 	unsigned long base = ((u64)high << 32) | low;
+	u64 pvcs_pa;
 
 	switch (msr) {
 	case MSR_FS_BASE:
@@ -126,6 +127,18 @@ static int notrace pvm_write_msr_safe(unsigned int msr, u32 low, u32 high)
 	case MSR_KERNEL_GS_BASE:
 		this_cpu_write(pvm_vcpu_struct.user_gsbase, base);
 		return 0;
+	case MSR_GS_BASE:
+		pvm_hypercall2(PVM_HC_WRMSR, msr, base);
+		/*
+		 * During the boot process, the boot CPU will switch GSBASE
+		 * from the .init.data area to the runtime per-CPU area (via
+		 * the PV-awared wrmsr() and reach here), so the architectural
+		 * physical address of PVCS needs to be updated.
+		 */
+		pvcs_pa = slow_virt_to_phys(this_cpu_ptr(&pvm_vcpu_struct));
+
+		wrmsrl(MSR_PVM_VCPU_STRUCT, pvcs_pa);
+		return 0;
 	default:
 		return pvm_hypercall2(PVM_HC_WRMSR, msr, base);
 	}
@@ -493,20 +506,6 @@ void __init pvm_early_setup(void)
 	pvm_early_patch();
 }
 
-void __init pvm_switch_pvcs(int cpu)
-{
-	/*
-	 * During the boot process, the boot CPU will switch GSBASE from the
-	 * .init.data area to the runtime per-CPU area, so we need to switch
-	 * the physical address of PVCS after that.
-	 */
-	if (boot_cpu_has(X86_FEATURE_KVM_PVM_GUEST) && !cpu) {
-		u64 xpa = slow_virt_to_phys(this_cpu_ptr(&pvm_vcpu_struct));
-
-		wrmsrl(MSR_PVM_VCPU_STRUCT, xpa);
-	}
-}
-
 void pvm_setup_event_handling(void)
 {
 	if (boot_cpu_has(X86_FEATURE_KVM_PVM_GUEST)) {