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Jinrong Liang
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KVM: x86/PVM: Add pvm.h and pvm_para.h header files to tools
Add the pvm.h and pvm_para.h header files to the tools to provide the necessary header files for tools that require PVM support, such as perf. The change should not have any negative impact on the existing tools or the kernel itself, as it simply makes the header files available for use by the tools that need them. Signed-off-by: Jinrong Liang <cloudliang@tencent.com>
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‎tools/arch/x86/include/uapi/asm/pvm.h‎

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/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
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#ifndef UAPI_KVM_X86_PVM_H
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#define UAPI_KVM_X86_PVM_H
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#include <linux/bitops.h>
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#include <uapi/asm/pvm_para.h>
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#define NMI_VECTOR 0x02
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#define SWITCH_EXIT_REASONS_SYSCALL 1024
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#define SWITCH_EXIT_REASONS_FAILED_VMETNRY 1025
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#define PVM_SYSCALL_VECTOR SWITCH_EXIT_REASONS_SYSCALL
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#define PVM_FAILED_VMENTRY_VECTOR SWITCH_EXIT_REASONS_FAILED_VMETNRY
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#define PVM_EXIT_REASONS_SHIFT 16
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#define PVM_EXIT_REASONS_SYSCALL BIT(PVM_EXIT_REASONS_SHIFT)
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#define PVM_EXIT_REASONS_HYPERCALL (2UL << PVM_EXIT_REASONS_SHIFT)
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#define PVM_EXIT_REASONS_ERETU (3UL << PVM_EXIT_REASONS_SHIFT)
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#define PVM_EXIT_REASONS_ERETS (4UL << PVM_EXIT_REASONS_SHIFT)
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#define PVM_EXIT_REASONS_INTERRUPT (5UL << PVM_EXIT_REASONS_SHIFT)
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#define PVM_EXIT_REASONS_INT80 (6UL << PVM_EXIT_REASONS_SHIFT)
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#define PVM_EXIT_REASONS \
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{ DE_VECTOR, "DE excp" }, \
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{ DB_VECTOR, "DB excp" }, \
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{ NMI_VECTOR, "NMI excp" }, \
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{ BP_VECTOR, "BP excp" }, \
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{ OF_VECTOR, "OF excp" }, \
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{ BR_VECTOR, "BR excp" }, \
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{ UD_VECTOR, "UD excp" }, \
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{ NM_VECTOR, "NM excp" }, \
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{ DF_VECTOR, "DF excp" }, \
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{ TS_VECTOR, "TS excp" }, \
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{ SS_VECTOR, "SS excp" }, \
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{ GP_VECTOR, "GP excp" }, \
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{ PF_VECTOR, "PF excp" }, \
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{ MF_VECTOR, "MF excp" }, \
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{ AC_VECTOR, "AC excp" }, \
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{ MC_VECTOR, "MC excp" }, \
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{ XM_VECTOR, "XM excp" }, \
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{ VE_VECTOR, "VE excp" }, \
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{ PVM_EXIT_REASONS_SYSCALL, "SYSCALL" }, \
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{ PVM_EXIT_REASONS_HYPERCALL, "HYPERCALL" }, \
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{ PVM_EXIT_REASONS_ERETU, "ERETU" }, \
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{ PVM_EXIT_REASONS_ERETS, "ERETS" }, \
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{ PVM_EXIT_REASONS_INTERRUPT, "INTERRUPT" }, \
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{ PVM_EXIT_REASONS_INT80, "INT80" }, \
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{ PVM_HC_LOAD_PGTBL, "HC_LOAD_PGTBL" }, \
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{ PVM_HC_IRQ_WIN, "HC_IRQ_WIN" }, \
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{ PVM_HC_IRQ_HALT, "HC_IRQ_HALT" }, \
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{ PVM_HC_TLB_FLUSH, "HC_TLB_FLUSH" }, \
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{ PVM_HC_TLB_FLUSH_CURRENT, "HC_TLB_FLUSH_CURRENT" }, \
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{ PVM_HC_TLB_INVLPG, "HC_TLB_INVLPG" }, \
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{ PVM_HC_LOAD_GS, "HC_LOAD_GS" }, \
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{ PVM_HC_RDMSR, "HC_RDMSR" }, \
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{ PVM_HC_WRMSR, "HC_WRMSR" }, \
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{ PVM_HC_LOAD_TLS, "HC_LOAD_TLS" }, \
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{ PVM_FAILED_VMENTRY_VECTOR, "FAILED_VMENTRY" }
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#endif /* UAPI_KVM_X86_PVM_H */

‎tools/arch/x86/include/uapi/asm/pvm_para.h‎

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/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
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#ifndef _UAPI_ASM_X86_PVM_PARA_H
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#define _UAPI_ASM_X86_PVM_PARA_H
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#include <linux/const.h>
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#include <linux/types.h>
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/*
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* The CPUID instruction in PVM guest can't be trapped and emulated,
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* so PVM guest should use the following two instructions instead:
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* "invlpg 0xffffffffff4d5650; cpuid;"
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*
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* PVM_SYNTHETIC_CPUID is supposed to not trigger any trap in the real or
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* virtual x86 kernel mode and is also guaranteed to trigger a trap in the
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* underlying hardware user mode for the hypervisor emulating it. The
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* hypervisor emulates both of the basic instructions, while the INVLPG is
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* often emulated as an NOP since 0xffffffffff4d5650 is normally out of the
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* allowed linear address ranges.
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*/
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#define PVM_SYNTHETIC_CPUID 0x0f,0x01,0x3c,0x25,0x50, \
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0x56,0x4d,0xff,0x0f,0xa2
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#define PVM_SYNTHETIC_CPUID_ADDRESS 0xffffffffff4d5650
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/*
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* The vendor signature 'PVM' is returned in ebx. It should be used to
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* determine that a VM is running under PVM.
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*/
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#define PVM_CPUID_SIGNATURE 0x4d5650
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/*
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* PVM virtual MSRS falls in the range 0x4b564df0-0x4b564dff, and it should not
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* conflict with KVM, see arch/x86/include/uapi/asm/kvm_para.h
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*/
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#define PVM_VIRTUAL_MSR_MAX_NR 15
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#define PVM_VIRTUAL_MSR_BASE 0x4b564df0
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#define PVM_VIRTUAL_MSR_MAX (PVM_VIRTUAL_MSR_BASE+PVM_VIRTUAL_MSR_MAX_NR)
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#define MSR_PVM_LINEAR_ADDRESS_RANGE 0x4b564df0
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#define MSR_PVM_VCPU_STRUCT 0x4b564df1
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#define MSR_PVM_SUPERVISOR_RSP 0x4b564df2
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#define MSR_PVM_SUPERVISOR_REDZONE 0x4b564df3
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#define MSR_PVM_EVENT_ENTRY 0x4b564df4
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#define MSR_PVM_RETU_RIP 0x4b564df5
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#define MSR_PVM_RETS_RIP 0x4b564df6
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#define MSR_PVM_SWITCH_CR3 0x4b564df7
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#define PVM_HC_SPECIAL_MAX_NR (256)
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#define PVM_HC_SPECIAL_BASE (0x17088200)
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#define PVM_HC_SPECIAL_MAX (PVM_HC_SPECIAL_BASE+PVM_HC_SPECIAL_MAX_NR)
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#define PVM_HC_LOAD_PGTBL (PVM_HC_SPECIAL_BASE+0)
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#define PVM_HC_IRQ_WIN (PVM_HC_SPECIAL_BASE+1)
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#define PVM_HC_IRQ_HALT (PVM_HC_SPECIAL_BASE+2)
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#define PVM_HC_TLB_FLUSH (PVM_HC_SPECIAL_BASE+3)
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#define PVM_HC_TLB_FLUSH_CURRENT (PVM_HC_SPECIAL_BASE+4)
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#define PVM_HC_TLB_INVLPG (PVM_HC_SPECIAL_BASE+5)
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#define PVM_HC_LOAD_GS (PVM_HC_SPECIAL_BASE+6)
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#define PVM_HC_RDMSR (PVM_HC_SPECIAL_BASE+7)
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#define PVM_HC_WRMSR (PVM_HC_SPECIAL_BASE+8)
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#define PVM_HC_LOAD_TLS (PVM_HC_SPECIAL_BASE+9)
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/*
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* PVM_EVENT_FLAGS_IF
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* - Interrupt enable flag. The flag is set to respond to maskable
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* external interrupts; and cleared to inhibit maskable external
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* interrupts.
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*
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* PVM_EVENT_FLAGS_IP
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* - interrupt pending flag. The hypervisor sets it if it fails to inject
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* a maskable event to the VCPU due to the interrupt-enable flag being
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* cleared in supervisor mode.
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*/
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#define PVM_EVENT_FLAGS_IP_BIT 8
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#define PVM_EVENT_FLAGS_IP _BITUL(PVM_EVENT_FLAGS_IP_BIT)
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#define PVM_EVENT_FLAGS_IF_BIT 9
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#define PVM_EVENT_FLAGS_IF _BITUL(PVM_EVENT_FLAGS_IF_BIT)
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#define PVM_LOAD_PGTBL_FLAGS_TLB _BITUL(0)
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#define PVM_LOAD_PGTBL_FLAGS_LA57 _BITUL(1)
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#ifndef __ASSEMBLY__
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/*
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* PVM event delivery saves the information about the event and the old context
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* into the PVCS structure if the event is from user mode or from supervisor
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* mode with vector >=32. And ERETU synthetic instruction reads the return
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* state from the PVCS structure to restore the old context.
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*/
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struct pvm_vcpu_struct {
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/*
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* This flag is only used in supervisor mode, with only bit 8 and
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* bit 9 being valid. The other bits are reserved.
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*/
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__u64 event_flags;
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__u32 event_errcode;
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__u32 event_vector;
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__u64 cr2;
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__u64 reserved0[5];
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/*
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* For the event from supervisor mode with vector >=32, only eflags,
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* rip, rsp, rcx and r11 are saved, and others keep untouched.
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*/
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__u16 user_cs, user_ss;
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__u32 reserved1;
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__u64 reserved2;
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__u64 user_gsbase;
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__u32 eflags;
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__u32 pkru;
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__u64 rip;
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__u64 rsp;
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__u64 rcx;
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__u64 r11;
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};
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/*
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* PVM event delivery saves the information about the event and the old context
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* on the stack with the following frame format if the event is from supervisor
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* mode with vector <32. And ERETS synthetic instruction reads the return state
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* with the following frame format from the stack to restore the old context.
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*/
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struct pvm_supervisor_event {
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/* vector in high32 */
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unsigned long errcode;
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unsigned long rip;
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unsigned long cs;
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unsigned long rflags;
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unsigned long rsp;
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unsigned long ss;
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unsigned long rcx;
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unsigned long r11;
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};
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#endif /* __ASSEMBLY__ */
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#endif /* _UAPI_ASM_X86_PVM_PARA_H */

‎tools/perf/check-headers.sh‎

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"arch/x86/include/uapi/asm/svm.h"
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"arch/x86/include/uapi/asm/unistd.h"
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"arch/x86/include/uapi/asm/vmx.h"
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"arch/x86/include/uapi/asm/pvm.h"
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"arch/x86/include/uapi/asm/pvm_para.h"
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"arch/powerpc/include/uapi/asm/kvm.h"
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"arch/s390/include/uapi/asm/kvm.h"
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"arch/s390/include/uapi/asm/kvm_perf.h"

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