@@ -623,6 +623,7 @@ Instr::Ptr Emulator::decode(uint32_t code, uint32_t /*wid*/, uint64_t uuid) {
623623 instr->set_args (IntrBrArgs{funct3, addr});
624624 instr->set_src_reg (0 , rs1, RegType::Integer);
625625 instr->set_src_reg (1 , rs2, RegType::Integer);
626+ instr->set_wstall (true );
626627 } break ;
627628 case Opcode::JAL: {
628629 auto unordered = code >> shift_funct3;
@@ -635,6 +636,7 @@ Instr::Ptr Emulator::decode(uint32_t code, uint32_t /*wid*/, uint64_t uuid) {
635636 instr->set_op_type (BrType::JAL);
636637 instr->set_args (IntrBrArgs{0 , addr});
637638 instr->set_dest_reg (rd, RegType::Integer);
639+ instr->set_wstall (true );
638640 } break ;
639641 case Opcode::JALR: {
640642 auto imm12 = code >> shift_rs2;
@@ -643,6 +645,7 @@ Instr::Ptr Emulator::decode(uint32_t code, uint32_t /*wid*/, uint64_t uuid) {
643645 instr->set_args (IntrBrArgs{0 , addr});
644646 instr->set_dest_reg (rd, RegType::Integer);
645647 instr->set_src_reg (0 , rs1, RegType::Integer);
648+ instr->set_wstall (true );
646649 } break ;
647650 case Opcode::L:
648651 case Opcode::FL:
@@ -756,6 +759,7 @@ Instr::Ptr Emulator::decode(uint32_t code, uint32_t /*wid*/, uint64_t uuid) {
756759 auto imm12 = code >> shift_rs2;
757760 instr->set_op_type (BrType::SYS);
758761 instr->set_args (IntrBrArgs{0 , imm12});
762+ instr->set_wstall (true );
759763 }
760764 } break ;
761765 case Opcode::FCI: {
@@ -953,34 +957,40 @@ Instr::Ptr Emulator::decode(uint32_t code, uint32_t /*wid*/, uint64_t uuid) {
953957 case 0 : // TMC
954958 instr->set_op_type (WctlType::TMC);
955959 instr->set_src_reg (0 , rs1, RegType::Integer);
960+ instr->set_wstall (true );
956961 break ;
957962 case 1 : // WSPAWN
958963 instr->set_op_type (WctlType::WSPAWN);
959964 instr->set_src_reg (0 , rs1, RegType::Integer);
960965 instr->set_src_reg (1 , rs2, RegType::Integer);
966+ instr->set_wstall (true );
961967 break ;
962968 case 2 : // SPLIT
963969 instr->set_op_type (WctlType::SPLIT);
964970 instr->set_dest_reg (rd, RegType::Integer);
965971 instr->set_src_reg (0 , rs1, RegType::Integer);
966972 wctlArgs.is_cond_neg = (rs2 != 0 );
973+ instr->set_wstall (true );
967974 break ;
968975 case 3 : // JOIN
969976 instr->set_op_type (WctlType::JOIN);
970977 instr->set_src_reg (0 , rs1, RegType::Integer);
978+ instr->set_wstall (true );
971979 break ;
972- case 4 : // BAR
980+ case 4 : // BAR (sync)
973981 instr->set_op_type (WctlType::BAR);
974982 instr->set_src_reg (0 , rs1, RegType::Integer);
975983 instr->set_src_reg (1 , rs2, RegType::Integer);
976984 wctlArgs.is_sync_bar = 1 ;
977985 wctlArgs.is_bar_arrive = 0 ;
986+ instr->set_wstall (true );
978987 break ;
979988 case 5 : // PRED
980989 instr->set_op_type (WctlType::PRED);
981990 instr->set_src_reg (0 , rs1, RegType::Integer);
982991 instr->set_src_reg (1 , rs2, RegType::Integer);
983992 wctlArgs.is_cond_neg = (rd != 0 );
993+ instr->set_wstall (true );
984994 break ;
985995 case 6 : // BAR ARRIVE / WAIT
986996 instr->set_op_type (WctlType::BAR);
@@ -989,9 +999,11 @@ Instr::Ptr Emulator::decode(uint32_t code, uint32_t /*wid*/, uint64_t uuid) {
989999 instr->set_src_reg (1 , rs2, RegType::Integer);
9901000 wctlArgs.is_sync_bar = 0 ;
9911001 wctlArgs.is_bar_arrive = (rd != 0 );
1002+ instr->set_wstall (rd == 0 ); // stall on wait, not on arrive
9921003 break ;
9931004 case 7 : // WSYNC
9941005 instr->set_op_type (WctlType::WSYNC);
1006+ instr->set_wstall (true );
9951007 break ;
9961008 default :
9971009 std::abort ();
@@ -1046,7 +1058,7 @@ Instr::Ptr Emulator::decode(uint32_t code, uint32_t /*wid*/, uint64_t uuid) {
10461058 instr->set_op_type (TcuType::WMMA);
10471059 instr->set_args (IntrTcuArgs{is_sparse, 0 , 0 , fmt_s, fmt_d, 0 , 0 , 0 });
10481060 instr->set_macro_op ();
1049-
1061+ instr-> set_wstall ( true );
10501062 } break ;
10511063 #ifdef TCU_WGMMA_ENABLE
10521064 case 1 : { // WGMMA_SYNC — single macro Instr, sequencer expands to micro-ops
@@ -1057,7 +1069,7 @@ Instr::Ptr Emulator::decode(uint32_t code, uint32_t /*wid*/, uint64_t uuid) {
10571069 instr->set_op_type (TcuType::WGMMA);
10581070 instr->set_args (IntrTcuArgs{is_sparse, is_a_smem ? 1u : 0u , cd_nregs, fmt_s, fmt_d, 0 , 0 , 0 });
10591071 instr->set_macro_op ();
1060-
1072+ instr-> set_wstall ( true );
10611073 } break ;
10621074 #endif // TCU_WGMMA_ENABLE
10631075 default :
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