Harden vector rmask handling in assembler to prevent None << ... CI crash

[Copilot]

CI was failing while assembling generated code because vector instructions reached _convert_to_binary() with rmask=None, causing TypeError at (rmask << ...). This PR makes rmask handling explicit and deterministic for masked vector opcodes.

• Assembler encoding guard (assembler/assembly_to_binary.py)

  • Added a targeted guard for vector opcodes that encode rmask.
  • If rmask is missing, encoder now normalizes it to 0 instead of shifting None.

• Parser consistency for 3-operand vector forms (assembler/parser.py)

  • For masked unary/reduction opcodes (V_EXP_V, V_RECI_V, V_RED_SUM, V_RED_MAX), keep parsed mask aligned into rstride/rmask.
  • For vector ALU ops that can appear without explicit mask (V_ADD_VV, V_ADD_VF, V_MUL_VV, V_SUB_VV, V_MUL_VF), assign default rmask=0 in 3-operand form.

• Focused regression coverage (assembler/tests/test_vector_rmask_handling.py)

  • Added tests for:
    • parser defaulting missing vector ALU mask to 0;
    • encoder equivalence between missing mask and explicit rmask=0.

vector_ops_with_rmask = {"V_ADD_VV", "V_ADD_VF", "V_MUL_VV", "V_SUB_VV", "V_MUL_VF", "V_EXP_V", "V_RECI_V", "V_RED_SUM", "V_RED_MAX"}

if instruction.opcode in vector_ops_with_rmask and rmask is None:
    rmask = 0

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Original prompt

Fix the CI failure in PR #42 for repository AICrossSim/PLENA_Compiler.

Context:

• Failing job URL: https://github.com/AICrossSim/PLENA_Compiler/actions/runs/25994000622/job/76405182931?pr=42
• PR URL: Merge plena-compiler: graph-IR pipeline rewrite, mid_ir passes, SSB chain support #42
• Head SHA of the failing PR branch: 32a9bd5a6b8bd0a4a0a0fc922e4256a93bd69bb7
• Base branch: main
• PR head branch: plena-compiler

Observed failure from CI logs:

• TypeError: unsupported operand type(s) for <<: 'NoneType' and 'int'
• Crash site: assembler/assembly_to_binary.py, in _convert_to_binary, at the expression (rmask << (opw + 3 * ow))
• The failure happens while assembling generated code during CI.

Relevant code findings:

1. In assembler/assembly_to_binary.py, _convert_to_binary() encodes these opcodes using rmask:
   • V_EXP_V, V_RECI_V, V_RED_SUM, V_RED_MAX
   • and also vector ALU ops like V_ADD_VV, V_ADD_VF, V_MUL_VV, V_SUB_VV, V_MUL_VF
2. In assembler/parser.py, Instruction.__init__ sets self.rmask = rstride.
3. In parse_asm_file(), there is special handling for 3-operand forms of V_EXP_V, V_RECI_V, V_RED_SUM, V_RED_MAX so the 3rd operand is stored in rstride (thus also becoming rmask).
4. However, the crash indicates some instruction reached _convert_to_binary() with rmask is None, and the encoder unconditionally shifts it.
5. This suggests the assembler currently lacks validation and/or fallback handling for vector instructions that require an rmask field, especially when parse-time operand decoding leaves rmask unset.

Please make a focused fix that:

• Prevents the CI crash.
• Preserves intended instruction encodings for valid inputs.
• Handles vector instructions requiring rmask robustly.
• Adds clear validation or sensible defaults where appropriate instead of allowing a raw None << ... TypeError.

Recommended approach:

• Audit assembler/assembly_to_binary.py and assembler/parser.py together.
• Ensure opcodes with optional 3-operand forms (V_EXP_V, V_RECI_V, V_RED_SUM, V_RED_MAX) are parsed and encoded consistently.
• For any opcode that semantically requires rmask, either:
  • guarantee rmask is populated during parse, or
  • fail with a descriptive error that names the opcode and instruction fields, or
  • apply a documented default if the ISA intends omitted rmask to mean a specific value.
• Avoid broad behavior changes outside this bug.
• If straightforward, add or update tests covering the previously failing path.

Acceptance criteria:

• CI no longer fails with the NoneType << int error.
• The assembler behavior for vector instructions is deterministic and explicit.
• The change is limited and reviewable.

Create a pull request against main in AICrossSim/PLENA_Compiler.

The following is the prior conversation context from the user's chat exploration (may be truncated):

User: ```
===== VSRAM Memory Layout =====
Q Base Address: 1024
S Base Address: 9216
PV Base Address: 25600
O_Old Base Address: 41984
Computing 4 Q heads for KV head 0 in GQA mode
asm_tool.generate_binary(asm_path, mem_path)
File "/home/runner/work/PLENA_Compiler/PLENA_Compiler/assembler/assembly_to_binary.py", line 155, in generate_binary
binary_instruction = self._convert_to_binary(instruction)
^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
File "/home/runner/work/PLENA_Compiler/PLENA_Compiler/assembler/assembly_to_binary.py", line 92, in _convert_to_binary
(rmask << (opw + 3 * ow)) +
~~~~~~^^~~~~~~~~~~~~~~~
TypeError: unsupported operand type(s) for <<: 'NoneType' and 'int'
Error: Process completed with exit code 1.

你能直接把这个问题给我修了吗

Assistant: 可以，我已经发起修复流程了；现在在等你对刚才弹出的确认请求作出接受或拒绝，我才能继续。

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