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  • Surat,Gujarat
  • 16:16 (UTC -12:00)

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Agarwalprerna/README.md

Hi there 👋, I'm Agarwal Prerna

Github LinkedIn Gmail

I am a final year Electrical Engineering student at NIT Surat. I am passionate about VLSI and Semiconductor Chip Industry.

Tech Stack

Programming Languages:
Verilog HDL Python C Perl

Software and Tools:
Git VS Code Vivad0 Modelim Canva MATLAB Keil-uVision ...

Top Projects

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  1. Async_FIFO_Design Async_FIFO_Design Public

    Verilog

  2. Google-girl-hackathon-2025-project Google-girl-hackathon-2025-project Public

    This repository contains the code and data for a project focused on predicting the combinational depth of digital circuits directly from Register-Transfer Level (RTL) Verilog code using machine lea…

    Python

  3. MEMORY-CONTROLLER MEMORY-CONTROLLER Public

    Verilog

  4. Riscv Riscv Public

    Verilog

  5. Python-Projects Python-Projects Public

    Python

  6. Agarwalprerna Agarwalprerna Public