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pplx-decider: reference worker and Public231 C1 procedure - #166
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Pin perplexity-ai/pplx-decider-v1.1-27b at 14c9d901 and serve choice, noul and score through the checkpoint's own DecisionModel. CPU fixtures lock prompt text, answer order and the rejection boundary. No CUDA device was available, so the recipe records the sm_89 measurement steps and leaves p50/p95 unset. Co-authored-by: Hongsheng Liu <liuhongsheng4@huawei.com>
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The next step at head After successful load/warmup, capture one real A small reporting clarification would help now: mark the current 0/693 as not run (0 attempted; 693 planned) so it cannot be read as 693 attempted failures. The body already discloses no CUDA inference, and the metrics should convey the same status. Please also record the scope relationship with #140 (reference-worker initial serving milestone versus any retained Rust processor work), as raised there. Keep this draft and the explicit optimization hold until real measurements arrive. This comment does not claim new model execution or lift that hold. Agent-assisted readiness follow-up using the repository review skill pinned at trusted main |
Record the lab L20X Public231 C1 baseline at 1ba07d1 and skip the explicit SDPA mask when every padding bit is true. The latency delta is not measured. Co-authored-by: Hongsheng Liu <liuhongsheng4@huawei.com>
Accept stock Public231 only when thinking is {"enabled": false} and ignore
that object. No kernel change. Latency of this head is not measured.
Co-authored-by: Hongsheng Liu <liuhongsheng4@huawei.com>
Install causal-conv1d 1.7.0 with an sm_89 cubin and refuse CUDA startup when Transformers would still call F.conv1d. Latency of this head is not measured. Co-authored-by: Hongsheng Liu <liuhongsheng4@huawei.com>
H200 is sm_90. Upstream 1.7.0 already emits that cubin when nvcc is 11.8 or newer; the installer inserts it only if a sdist dropped the line. Co-authored-by: Hongsheng Liu <liuhongsheng4@huawei.com>
CUDA startup imports flash-linear-attention 0.5.2 before Qwen modeling and refuses the PyTorch chunk fallback. On SM90 with linear head dim 128, the chunk call is flashinfer.gdn_prefill, matching vLLM auto and SGLang's validated Hopper default. Otherwise health stays gdn=fla-chunk with flashinfer null. No CuteDSL and no CUDA graph. Co-authored-by: Hongsheng Liu <liuhongsheng4@huawei.com>
Upstream causal-conv1d 1.7.0 skips sm_89, so an L20X load would refuse the binary. The installer now adds that cubin and still refuses a build that lacks it. Ready continues to fail when Qwen would bind F.conv1d. Co-authored-by: Hongsheng Liu <liuhongsheng4@huawei.com>
sm_89 classification prefill stays on flash-linear-attention's Triton chunk kernel plus causal_conv1d. /health shows linear_attention=fla-chunk. FlashInfer, CuteDSL, and CUDA graphs are not selected. Co-authored-by: Hongsheng Liu <liuhongsheng4@huawei.com>
Lab GPUs labeled L20X are the H200 target and may report either capability. The causal-conv1d build inserts a missing sm_90 line and an sm_89 line, and refuses to build when either cubin is absent. Co-authored-by: Hongsheng Liu <liuhongsheng4@huawei.com>
Capability 9.0 replaces the Qwen chunk global with FlashInfer GDN prefill when flashinfer-python 0.6.16.post3 imports. Capability 8.9, and capability 9.0 without that package, stay ready on fla-chunk plus causal_conv1d. The device name is not a gate. /health reports both binds. Co-authored-by: Hongsheng Liu <liuhongsheng4@huawei.com>
Record that the lab L20X-labeled GPU stays the measurement host and that this head has no Public231 sample. Co-authored-by: Hongsheng Liu <liuhongsheng4@huawei.com>
The lab L20X-labeled host measured 231/231, p50 98.037 ms, p95 302.569 ms on fla-chunk with flashinfer null. Against 1ba07d1 run1 that is p50 -0.74 ms (-0.75%) and p95 -38.6 ms (-11.32%). Keep that tip. This commit only records the paste. Co-authored-by: Hongsheng Liu <liuhongsheng4@huawei.com>
The kept remeasure was ready with flashinfer null. Absence and an import failure both stay on fla-chunk. The install script is the next candidate and is not part of that primary. Co-authored-by: Hongsheng Liu <liuhongsheng4@huawei.com>
Warmup 5, concurrency 1, stock Public231 with thinking.enabled=false, metric successful_latency: 231/231, p50 94.077 ms, p95 300.200 ms, compute capability 9.0, fla-chunk, flashinfer null. Versus 1ba07d1 run1 that is p50 -4.700 ms (-4.76%) and p95 -41.002 ms (-12.02%). The FlashInfer candidate stays inconclusive. Co-authored-by: Hongsheng Liu <liuhongsheng4@huawei.com>
The all-sequence bind improved p50 and missed p95. A forward stays on FLA chunk when it has more than one sequence or more than 256 tokens. PPLX_GDN_PREFILL=fla holds the pin and reproduces the primary chunk. Co-authored-by: Hongsheng Liu <liuhongsheng4@huawei.com>
Capability 9.0 no longer binds FlashInfer for every sequence. The kept primary remains the FLA chunk. Co-authored-by: Hongsheng Liu <liuhongsheng4@huawei.com>
The ≤256 FlashInfer cutoff missed the gate. Startup stays on FLA chunk unless PPLX_GDN_PREFILL=short. CUDA forwards prefer cuDNN SDPA unless PPLX_SDPA=default. Co-authored-by: Hongsheng Liu <liuhongsheng4@huawei.com>
Public231 C1 was 231/231, p50 95.446 ms, p95 300.871 ms. Primary stays f968e57. The cuDNN-first candidate has no sample. Co-authored-by: Hongsheng Liu <liuhongsheng4@huawei.com>
cuDNN-first SDPA missed the gate and is no longer selectable. Startup keeps the checkpoint SDPA order and FLA chunk, and on CUDA replaces each text MLP gate and up projection with one GEMM. PPLX_MLP=default keeps the checkpoint modules. Co-authored-by: Hongsheng Liu <liuhongsheng4@huawei.com>
Fused gate-up missed the gate and is not selectable. CUDA compiles the language-model forward with a dynamic sequence length and warms it before /health. GEMM shapes, SDPA order, and FLA chunk stay put. PPLX_COMPILE=default leaves the forward eager. Co-authored-by: Hongsheng Liu <liuhongsheng4@huawei.com>
The 512-token split on 7e3b1be cut p95 to 257.084 ms and raised p50 to 100.037 ms, so the primary stays f968e57. Shorter sequences now call the original forward with Dynamo suspended and the pre-compile CUDA flags restored. Startup requires a 136-token forward to take that eager route. Co-authored-by: Hongsheng Liu <liuhongsheng4@huawei.com>
CPU startup leaves the forward eager, so health names that median path. Co-authored-by: Hongsheng Liu <liuhongsheng4@huawei.com>
34ba5de proved the 136-token route was eager and still raised p50 to 97.084 ms, so compile stays off. All-sequence FlashInfer keeps the measured p50 win and reuses one cu_seqlens per device and length instead of allocating one on every linear layer. Co-authored-by: Hongsheng Liu <liuhongsheng4@huawei.com>
ffae182 passed Public231 C1 at 92.844 / 296.458 and is the new primary. The next tip still uses all-sequence FlashInfer and rotates 48 distinct cu_seqlens tensors per device and length so one forward does not share a single buffer. That ring has no sample. Co-authored-by: Hongsheng Liu <liuhongsheng4@huawei.com>
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Thanks for this. No correctness findings on the main contract path; re-verified locally: 86 passed, P2 The template self-review checklist is still unchecked and the body does not yet report authored-vs-total diff counts (authored Python ≈3.2k lines, total ≈4.8k). Per P2 On capability 8.9 an unknown P2 P3 P3 The P3 (nits) Provenance: skill |
4b99b73 passed Public231 C1 at 88.942 / 295.797 and is the new primary. The next tip keeps 48 float32 state workspaces so FlashInfer does not allocate one on every linear layer. That ring has no sample. Co-authored-by: Hongsheng Liu <liuhongsheng4@huawei.com>
Public231 C1 for 17a7b12 was 231/231, p50 89.165 ms, p95 295.723 ms. That missed the median, so the primary stays 4b99b73. The next lever replaces the eager zero-centered residual RMSNorms with one FLA kernel whose autotune key does not depend on sequence length. Co-authored-by: Hongsheng Liu <liuhongsheng4@huawei.com>
Public231 C1 for 705ae08 was 231/231, p50 94.604 ms, p95 274.835 ms. The 512-token RMSNorm gate missed the median, so the primary stays 4b99b73 and residual RMSNorm stays eager. The next lever passes use_cp=auto. Forty-eight value heads on one sequence are under the H200 threshold that FlashInfer uses for that kernel. Co-authored-by: Hongsheng Liu <liuhongsheng4@huawei.com>
Public231 C1 for a6f4d9a was 231/231, p50 112.294 ms, p95 299.419 ms. use_cp=auto engaged and missed both percentiles, so the primary stays 4b99b73 and use_cp stays false. The next lever leaves q and k at 16 heads and lets FlashInfer's grouped-value path own the 48 value heads. Co-authored-by: Hongsheng Liu <liuhongsheng4@huawei.com>
Public231 C1 for fcf5e2b was 231/231, p50 87.782 ms, p95 291.183 ms. Both percentiles beat 4b99b73, so that packed GVA path is the primary. The next lever replaces the 48 eager gated output norms with one FLA kernel. Residual RMSNorm stays eager. No latency claim for this tip. Co-authored-by: Hongsheng Liu <liuhongsheng4@huawei.com>
Public231 C1 for 801ef7b was 231/231, p50 89.172 ms, p95 274.790 ms. The gated RMSNorm cut the tail and missed the median, so the primary stays fcf5e2b and that kernel stays off. This tip replaces silu(gate)*up on the 64 text MLPs with swiglu_fwd. The GEMMs stay separate. No latency claim for this tip. Co-authored-by: Hongsheng Liu <liuhongsheng4@huawei.com>
Unknown PPLX_GDN_PREFILL now raises on every device, including capability 8.9. decide() maps only the token-limit sentence to HTTP 422. Checkpoint pin failures, falsy prompt fallbacks, the sdist extract filter, and the image character-limit message are covered. 2bbbe4e missed both percentiles, so swiglu_fwd stays unwired and the running path matches fcf5e2b. No new latency claim. Co-authored-by: Hongsheng Liu <liuhongsheng4@huawei.com>
Metrics
fcf5e2bef916da81180ac8f1570dff338e8a049d801ef7b103c9285bef749d54af6cea6f4472088bfcf5e2be87.782 / 291.1832bbbe4eda71bb745c3b87a1f06c4a23eae68db4drejected in the owner closeout at p50 97.613 ms, p95 292.795 ms. Not installed509bdd2161ca5bef8f5e158d466514862fac7c9emlp=default,fused_swiglu_layers=0,gated_norm=eagerDraft stays open. Do not merge without a separate owner yes. No new latency win is claimed.
Tracks #161.
Required human contributor answers
What outcome are you trying to achieve?
Answer: Reject
801ef7b, keepfcf5e2be, drop always-on FLA fused gated_norm, and push one tip that beats both 87.782 and 291.183 without sacrificing p50. Draft pplx-decider: reference worker and Public231 C1 procedure #166 stays open. No merge. Source: "Decision: reject this tip. ... Protect p50. Drop always-on FLA fused gated_norm ×48 on this path (or any tip that trades p50 for p95). Keep primary GVA+contiguous. Next tip must beat both 87.782 and 291.183 without sacrificing p50. Draft pplx-decider: reference worker and Public231 C1 procedure #166 stays open onfcf5e2be. No merge." The later owner closeout records2bbbe4edas rejected and closes the latency story atfcf5e2be.What is the highest-leverage variable for that outcome?
Answer: Both p50 and p95 strictly under 87.782 / 291.183, protecting p50. Source: "Gate: both must be strictly under → HOLD_PRIMARY" and "Same pattern as prior FLA residual RMSNorm tips — p95 win, p50 lose. Protect p50."
How will this work move that variable rather than create busywork?
Answer: Protect p50. Drop always-on FLA fused gated_norm. Do not trade p50 for p95. The owner did not name the next kernel. Source: "Protect p50. Drop always-on FLA fused gated_norm ×48 on this path (or any tip that trades p50 for p95)."
Who is the customer or user, and what do they actually need?
Answer: The owner of draft pplx-decider: reference worker and Public231 C1 procedure #166. The draft stays open and this tip is not merged. Source: "Draft pplx-decider: reference worker and Public231 C1 procedure #166 stays open on
fcf5e2be. No merge." This turn also follows the owner request to address the review on pplx-decider: reference worker and Public231 C1 procedure #166 without merging.After answering the four questions: is a PR needed at all to achieve this outcome?
Human decision and rationale (or explicit source reference): Yes. Continue draft #166. Do not merge. Source: "Draft #166 stays open on
fcf5e2be. No merge." and the owner closeout "Do not merge without a separate yes."For a bug fix: link actual observed failure evidence.
Evidence: Not a bugfix of the kept primary.
801ef7bran and missed the gate: 231/231, p50 89.172 ms, p95 274.790 ms. The owner closeout records2bbbe4edat p50 97.613 ms, p95 292.795 ms and rejects it. The review comments are code-correctness items, not a new latency result.Purpose
Serve
perplexity-ai/pplx-decider-v1.1-27bat14c9d90137962d300f3de95633f7b6535e80c5ce.The kept primary is
fcf5e2bef916da81180ac8f1570dff338e8a049d: 231/231, p50 87.782 ms, p95 291.183 ms.801ef7band2bbbe4eare rejected.509bdd2does not install either kernel. Startup again matches the packed GVA primary.Review comments from #166 (comment):
PPLX_GDN_PREFILLraises before the capability check, including on CPU and capability 8.9.decide()maps onlyQuestion branch exceeds the 8192-token limit; no input was truncated.to HTTP 422. Any otherValueErrorfromevaluatestays a 500.verify_checkpointfailure paths have weight-freetmp_pathtests: missing file, hash mismatch,decision_configfield mismatch."",[],{}) are pinned bynoul-falsy-fallbacksintests/pplx_decider/fixtures/reference_cases.json, whichcheck_contract.pyalready walks, plus a unit test.tarfile.extractall(..., filter="data")ininstall_causal_conv1d.py.origin/mainmoved to8228551.git merge-tree --write-treeagainst that main exited 0, so no conflict commit was made.Test Plan
PYTHONPATH=src python3 -m pytest tests/pplx_decider -qPYTHONPATH=src python3 -m compileall -q src/models/pplx_decider src/frontend/pplx_decider.py tests/pplx_decider recipe/pplx_decider/install_causal_conv1d.pySystem1-Omni Version / Commit: kept primary
fcf5e2bef916da81180ac8f1570dff338e8a049d. Head509bdd2161ca5bef8f5e158d466514862fac7c9eoncursor/pplx-decider-27b-8ee9. Merge basecd302b6e3d7723ebfc33bba9698da2c1e881f203.Test Result
CPU checks on
509bdd2: pytest 115 passed, compileall success. No NVIDIA device here, so the CUDA forward was not executed.The falsy-fallback fixture was compared locally to an AST extract of the pinned
model.py(describe,options,decision_messages,answer). Messages and the noul answer matched.check_contract.pyagainst a checkpoint directory was not run.mkdocs build --strictwas not run.Diff size and review map
Against merge base
cd302b6e, including this head:src/Pythontests/Pythonrecipe/PythonThe diff is one worker, its tests, and its recipe. Splitting it would separate the contract from the checks that pin it. Read in this order:
src/models/pplx_decider/contract.pyandtests/pplx_decider/test_contract.py— admission, prompts, image limits.src/models/pplx_decider/engine.pyandtests/pplx_decider/test_checkpoint.py— pin and startup, including unconditionalPPLX_GDN_PREFILL.src/frontend/pplx_decider.pyandtests/pplx_decider/test_worker.py— 422 only for the token-limit sentence; otherValueErroris 500.gdn.py,attention.py,conv.py,mlp.py,rmsnorm.py,gated_norm.py,swiglu.py,compile_forward.py— kernel binds.swiglu.pyandgated_norm.pyremain as rejected implementations and are not installed.recipe/pplx_decider/and the status docs — measured primaryfcf5e2b; rejected tips stay rejected.Demo / evidence
N/A for a video. Latency evidence is the owner pastes and the owner closeout already in this description. Raw
responses.jsonlwas not attached. This commit has no new latency sample.Self-review
The PR stays draft. Do not merge.
Optimization closeout (2026-10-25)
Status: ready for owner review — no merge
Close at best-so-far primary:
fcf5e2bef916da81180ac8f1570dff338e8a049dProtocol: Public231 C1, warmup 5, concurrency 1, metric
successful_latencyGain chart: shared in system1 room
Goal
Serve
perplexity-ai/pplx-decider-v1.1-27bwith a measured Public231 C1 primary, advancing only when both p50 and p95 beat the kept primary (231/231, quality not regress).Current primary (best so far)
fcf5e2bef916da81180ac8f1570dff338e8a049dgdn_layout=gva, 48 layers) + contiguous q/k before FLA l2norm; eager residual RMSNorm; 48-slot cu_seqlens ring; compile off509bdd2review fixes. Historical2bbbe4ed(FLA swiglu) stays REJECT and is not installed收益 (gains) vs campaign start
Campaign start = earliest remesure baseline
1ba07d1598.777 / 341.202.1ba07d15fcf5e2beVs immediate prior primary
4b99b73(88.942 / 295.797): p50 −1.30%, p95 −1.56% (the KEEP that setfcf5e2be).搜索过程 (search process)
Best-so-far rises only on KEEP . Selected ledger (disk GATE/REPORT where available):
1ba07d15f968e5763c72f02a50b9aaa0dcaa0ac8b4ee326e36b32edtorch.compiledynamic7e3b1be134ba5deffae182c4b99b7317a7b1203afb472705ae089a6f4d9ause_cpheuristic3ecdf5adfcf5e2be801ef7b12bbbe4edswiglu_fwd×64† First disk remesure of
f968e576was 98.037/302.569 vs1ba07d15; subsequent tips gated against the settled primary paste 94.077/300.200 recorded in the PR tip chain.What worked vs rejected (lessons)
3c72f02) — dual gate correctly HOLDs. Blind FLA kernel swaps (swiglu, always-on gated_norm) hurt p50.3ecdf5adwarmup crash); next tips need profile / length buckets, not more unattributed kernel tries.Closeout
Draft for owner review. Close latency story at
fcf5e2be. Head509bdd2does not install rejected2bbbe4ed. Do not merge without a separate yes.Optimization closeout (2026-10-25)
Status: ready for owner review — no merge
Close at best-so-far primary:
fcf5e2bef916da81180ac8f1570dff338e8a049dProtocol: Public231 C1, warmup 5, concurrency 1, metric
successful_latencyGain chart: shared in system1 room
Goal
Serve
perplexity-ai/pplx-decider-v1.1-27bwith a measured Public231 C1 primary, advancing only when both p50 and p95 beat the kept primary (231/231, quality not regress).Current primary (best so far)
fcf5e2bef916da81180ac8f1570dff338e8a049dgdn_layout=gva, 48 layers) + contiguous q/k before FLA l2norm; eager residual RMSNorm; 48-slot cu_seqlens ring; compile off2bbbe4ed(FLA swiglu) — measured, REJECT收益 (gains) vs campaign start
Campaign start = earliest remesure baseline
1ba07d1598.777 / 341.202.1ba07d15fcf5e2beVs immediate prior primary
4b99b73(88.942 / 295.797): p50 −1.30%, p95 −1.56% (the KEEP that setfcf5e2be).搜索过程 (search process)
Best-so-far rises only on KEEP . Selected ledger (disk GATE/REPORT where available):
1ba07d15f968e5763c72f02a50b9aaa0dcaa0ac8b4ee326e36b32edtorch.compiledynamic7e3b1be134ba5deffae182c4b99b7317a7b1203afb472705ae089a6f4d9ause_cpheuristic3ecdf5adfcf5e2be801ef7b12bbbe4edswiglu_fwd×64† First disk remesure of
f968e576was 98.037/302.569 vs1ba07d15; subsequent tips gated against the settled primary paste 94.077/300.200 recorded in the PR tip chain.What worked vs rejected (lessons)
3c72f02) — dual gate correctly HOLDs. Blind FLA kernel swaps (swiglu, always-on gated_norm) hurt p50.3ecdf5adwarmup crash); next tips need profile / length buckets, not more unattributed kernel tries.Closeout
Draft for owner review. Close latency story at
fcf5e2be. Branch head may still be2bbbe4ed(rejected) — prefer tip head reset to primary before merge review. Do not merge without a separate yes.