riscv: allow single-precision float ABI (lp64f / ilp32f)#349
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The header rejected __riscv_float_abi_single with an #error, but the F and D extensions share the same FCSR. The hard-float inline implementations below the guard use only csrr/csrw/csrc on fcsr and fflags, both of which are present whenever F is present. So lp64f / ilp32f can use the same code path as the double ABI. Closes JuliaMath#262. Co-Authored-By: Claude Opus 4.8 (1M context) <noreply@anthropic.com>
The lp64f / ilp32f ABI used to be rejected by openlibm_fenv_riscv.h with an #error. Add a compile-only cross job that rebuilds the static library with -mabi=lp64f so the removed #error stays removed. A full lp64f shared-lib link or qemu run is impossible because Ubuntu's gcc-riscv64-linux-gnu ships only the lp64d sysroot; the static archive needs no libc link, so it still compiles riscv64/fenv.c (and every other source) under the single-float ABI. Co-Authored-By: Claude Opus 4.8 (1M context) <noreply@anthropic.com>
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Summary
Fixes #262. The RISC-V fenv header rejected
__riscv_float_abi_single(lp64f, ilp32f) with an `#error`, but the rejection isn't warranted: the F and D extensions share the same `fcsr` / `fflags` CSRs. The hard-float inline implementations below the guard use only `csrr`/`csrw`/`csrc` on those CSRs, all of which are present whenever F is present.So lp64f / ilp32f can use the existing hard-float code path unchanged.
```diff
-#if !defined(__riscv_float_abi_soft) && !defined(__riscv_float_abi_double)
-#if defined(__riscv_float_abi_single)
-#error single precision floating point ABI not supported
-#else
+#if !defined(__riscv_float_abi_soft) && !defined(__riscv_float_abi_double) && \
#error compiler did not set soft/hard float macros
#endif
-#endif
```
Test plan
doubleABI users; lp64f users no longer hit the `#error`).🤖 Generated with Claude Code