cuda+engine: full fmt=4 (grouped int4 gs=64) support + diagnostic harness#298
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Two things before this can land: it's still marked WIP (4/5 tasks) and it now conflicts with |
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it wasnt ready for some reason i pushed it before bed last night lol, sorry about that. there are serious regressions with the new model. |
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lol apparently me and someone else had the same idea cause the conflicts are the same things i fixed somehow ??? :D running the tests now will post back in an hour. |
@bokiko benchmarked the feature on three hosts and found every setting is either no faster or no longer coherent. Reproduced here on a 25 GB box, and the numbers are worse than "a quality/speed tradeoff": - budget=8 -> hellaswag 30% vs 90% with it off (25% is the chance floor) - budget=4 -> decode is literal noise ("The **1...: s2151:") - MTP acceptance 0%. Which experts survive the cap depends on cache residency at the moment of the forward, so draft and verify do not compute the same function -- the invariant #294 just established for #163, violated through cache state instead of kernel dispatch. SPEC_PIN cannot fix that and should not try: it is feature semantics, not dispatch. - 0.13 tok/s vs 0.30 baseline, while loading 14.66 experts per layer against a topk=8 baseline. The cap does MORE disk I/O than not using it. "~335 GB I/O saved" counts dropped experts, not bytes not read. EXPERT_BUDGET>0 is now ignored unless EXPERT_BUDGET_EXPERIMENTAL=1, with the measurements printed. The code stays compiled and developable: MoE-Spec (arXiv 2602.16052) is not a wrong idea, this implementation just has no point where it is both faster and correct. Re-enabling it by default needs a quality number next to every speed number. Also gates the cap to decode (S<=4), @woolcoxm's fix from #292/#298: during prefill the batch union is 30-100+ experts, and capping to 4-8 drops most of them, corrupting the hidden state and therefore the KV cache. Necessary but not sufficient -- the run above already includes it. Removes issue_budget.md, issue_diskio.md and issue_grouped_quant.md: design notes in the repo root, unlinked from any README, whose only user-facing content was "EXPERT_BUDGET=6-8 -- good speedup, minimal quality loss" and "+83% decode at budget=4". Measurement says otherwise, and they were the only thing on main telling anyone to switch this on. They stay in history. Reported-by: bokiko <#303> Co-Authored-By: woolcoxm <#292> Co-Authored-By: Claude Opus 4.8 <noreply@anthropic.com>
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perhaps you can help? your testing harness is giving me serious issues that i cant quite solve, for some reason in the generation it is NULLing everything. i cant quite find why. this is with CUDA enabled. i would run the test harness without cuda, but the regressions im facing are making the model run at .003 tok/sec it will take a month to run your script. nm i figured it out, the kvcache was corrupting. |
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Ok let me know how i can help! |
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for the life of me i can not get this issue solved lol, i fix it and more corruption happens elsewhere, perhaps my model is not fully supported yet thought i did all the work yesterday, ill have to do a deep dive. |
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No problem, thank you so much for your help and support on this issue! If we can fix this, the tok/s will become incredible for everyone! |
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doing my deepdive now ill post back in an hour when i fix the issue, im fairly certain my support of gs64 is lacking lol, there is no way i am having these kinds of regressions just from a model change :D |
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i see what happened lol, i did all the CPU work but must have gotten tired when it came to CUDA which would make sense about the weird commit :) |
The CUDA backend had no fmt=4 case anywhere. Every kernel assumed per-row scales (one scale per output row). Grouped int4 (fmt=4) needs per-group scales (one scale per gs=64 elements along the input dim), applied inline during the dot-product accumulation, not once at the end. Changes to backend_cuda.cu: - ColiCudaTensor: added gs, ng fields (group size + groups per row) - GroupDesc: added g_gs/g_ng, u_gs/u_ng, d_gs/d_ng for expert kernels - row_bytes/weight_at: added fmt=4 case (same nibble layout as fmt=2) - scale_at(): new device helper — per-row for fmt 1/2/3, per-group for fmt=4 - quant_matmul: scale applied inline via scale_at (not at end) - grouped_hidden/down, grouped_hidden_w4/_dual, grouped_down_w4: same - attention_absorb_kernel/batch_kernel: per-group scale in q/v projections - All kernel launch sites updated to pass gs,ng - coli_cuda_tensor_upload_grouped: new upload that accepts gs, allocates O*ng scales for fmt=4; old upload delegates with gs=0 - offset_to_signed_s4 conversion fires for fmt=4 (same encoding as fmt=2) Changes to backend_cuda.h: declare coli_cuda_tensor_upload_grouped Changes to backend_loader.c: resolve + wrap the new symbol Changes to glm.c: qt_cuda_upload routes fmt=4 to grouped upload; dropped the w->fmt!=4 guard in matmul_qt_ex (CUDA now handles fmt=4) Verified: SCORE mode (log-likelihood eval) with CUDA_DENSE+CUDA_ATTN on g64 model — single request, 401-token request, no crash, correct scores. Refs JustVugg#292 JustVugg#298
… PR JustVugg#298) The fmt=4 CUDA support is implemented (commit 7499eac) but causes repeated system crashes (0x116 VIDEO_TDR_FAILURE) on sm_120 Blackwell GPUs. Despite kernel chunking and TDR registry changes, the crashes persist. Restoring the guard keeps fmt=4 on the CPU path (matmul_i4_grouped) which is correct and stable. The CUDA code remains for when the driver stability issue is resolved. See PR JustVugg#298 for the full crash analysis and implementation details.
CUDA fmt=4 support: implementation complete but system-instability blocks GPU pathWhat's implementedFull fmt=4 (grouped int4, gs=64) CUDA support was implemented across all code paths:
The blocker: system crashesDespite the implementation being complete and correct in principle, enabling fmt=4 on GPU causes repeated hard system crashes on the test machine. The Crash evidence (redacted):
Crash analysis: The research is conclusive on the mechanism:
What would resolve this
Current state
Research sources (key findings)
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need someone with more knowledge to help on this one. cant run verification on cpu it will take 8 hours for 5 prompts, the gpu is not working after updating to gs64, it blue screens now for some reason, i dont exactly understand cuda so ai was helping me, it didnt know what to do and neither did i lol should be noted the previous crashes on the system were also cuda code modifications that i also had to revert due to blue screens. and this would explain why the cuda code was incomplete, i probably worked on it till 4am and made no progress. |
fmt=4 (grouped int4 gs=64) CUDA support: implementation complete but blocked by GPU driver instabilityContextI spent ~4 hours implementing fmt=4 grouped int4 (gs=64) support on the CPU side (loader detection, matmul kernel, expert loading). The CPU path works correctly and is stable. I then spent several more hours trying to add CUDA GPU support for fmt=4 so the eval harness and generation could use the GPU. This issue documents what was implemented, every crash, what was tried, and why I'm stuck. What was implemented (CPU — works, stable, committed)
What was implemented (CUDA — code complete, but causes system crashes)All code is committed but guarded off ( What the CUDA code does:
The crashThe moment fmt=4 tensors are allowed on the GPU, the system hard-crashes. This happened 5+ times. Every crash was identical: Symptom: System freezes completely (no BSOD screen, no response, hard power-off required). Windows Event Viewer shows:
What The GPU: Very new architecture (Blackwell, compute capability 12.0) with an early driver (610.74). Multiple NVIDIA forum threads document unrecoverable CUDA driver crashes on this GPU family. What was tried (and what happened)Attempt 1: Drop the
Attempt 2: Implement full fmt=4 CUDA support (all kernels, upload, scale_at).
Attempt 3: Identified the TDR timeout.
Attempt 4: Fixed the attention chunking bug.
Attempt 5: Increased TDR timeout via registry (
Attempt 6: Restored the
VRAM usage analysisThe fmt=4 dense tensors for GLM-5.2 (78 layers × 8 tensors/layer = 624 tensors):
The VRAM math works. The crash is not VRAM exhaustion — it's a driver fault. Why I can't fix this
What would help
Current code state (branch
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| commit | description | status |
|---|---|---|
6ee8529 |
CPU fmt=4 instrumentation + router sort | ✅ working |
4c31ad2 |
Profile accounting fix (t_edisk) | ✅ working |
dc3f260 |
Comprehensive profiling timers | ✅ working |
7dedd63 |
EXPERT_BUDGET decode-only fix (prefill corruption) | ✅ working |
7499eac |
CUDA fmt=4 full support (all kernels + upload) | |
1fd2655 |
CUDA chunking fix (TDR prevention + s_offset) | |
e2f519d |
Restore fmt!=4 safety guard |
✅ current HEAD |
The CUDA code is there for anyone with the expertise to debug the driver issue. The CPU path is correct and stable.
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i believe this is a timing issue, but im not 100% sure, there is a timing thing in windows where the video card has 2 seconds to respond to something or it goes into some kind of panic mode and blue screens/crashes. im exceeding this 2 seconds i think but im not sure how to fix it. |
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CUDA is completely broken DO NOT RUN CUDA ON THIS BUILD WITH GS64!!!!!! i tried to have ai help me, ive been working on it since about 4am this morning. this is the ai token count trying to solve the issue.... |
matmul_i4_grouped is the reference the CUDA fmt=4 port (#298) is expected to reproduce, and it had no test of its own. @woolcoxm is currently debugging a CUDA backend against an oracle nobody had verified, which is two moving targets at once -- and he can't cross-check on CPU, since a 5-prompt run takes 8 hours on the 744B model. This checks matmul_i4_grouped against a plain-C reference that dequantizes nibble -> (v-8)*scale[i/gs] and accumulates in double, over 11 shapes: I a clean multiple of gs, a partial last group (the glen clamp), odd I (the scalar nibble tail), gs > I, gs=16/64/128, S>1, and the nibble extremes 0x00/0xFF -- which decode to -8/+7 because the format is offset-encoded, not two's complement. Reading that backwards turns 15 into -1 and looks like data-dependent noise rather than a bug. All 11 shapes match to ~1e-8 relative, so the CPU kernel is exact and can be trusted as the reference. One note on the tolerance, because the first draft of this test got it wrong and "found" a bug that wasn't there: the error is compared against the sum of |terms|, not against |result|. A dot product of signed terms can land near zero through cancellation, and then a 1e-6 absolute error -- ordinary f32 accumulator precision -- reads as a 1e-3 relative one. A wrong scale index or a wrong group boundary shifts the result by a fraction of the terms, so it is still caught at 1e-6. Co-Authored-By: Claude Opus 4.8 <noreply@anthropic.com>
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Stop debugging this at 4am with 466M tokens of AI guessing — you're being asked to do something genuinely hard with no oracle. Let me hand you three things: a reference you can trust, a real bug I found, and a reason this PR matters more than you think. 1. Your gs64 observation may be the most important thing in this repo right nowYou wrote on #307: "the gs64 fixed this issue." Three separate people have reported that repetition bug — @galmok (#307), @CorentinWicht (#307), and you. All on per-row int4. You're the only one who's run g64, and it's gone for you. Look at what the engine already does: if(g_temp<0) g_temp=0.7f; /* auto: 0.7, NOT the official 1.0 — the tail of the
* int4 distribution is quantization noise */We are already compensating for per-row int4 damage by tightening sampling below GLM-5.2's official temperature — and tight sampling is exactly what traps a model in a repetition attractor. @bokiko independently said on #303 that the clean quality A/B was blocked on the same grouped container. Three threads, one root cause. So this isn't a performance PR. It's plausibly the fix for a correctness bug that three users have hit, and the CUDA half is the only thing standing in the way. That's worth finishing carefully rather than fast. 2. Here's the oracle you're missingPushed to Result: the CPU grouped kernel is exact (~1e-8 relative). You can trust it as the reference. Build it with That's the thing you've been missing: a pass/fail you can iterate against in a loop, instead of inferring correctness from a model's prose. I'd suggest adding One warning from writing it: my first version reported a failure that wasn't real. It compared the error against 3. A real bug in the current diff
int rb=l->kv_b.fmt==1?l->kv_b.I:
(l->kv_b.fmt==2||l->kv_b.fmt==4)?(l->kv_b.I+1)/2:(l->kv_b.I+3)/4; /* fixed */
const uint8_t *weights=...;
const float *scale=l->kv_b.s+(int64_t)h0*(Q+V); /* <-- assumes 1 scale per row */Under fmt=2 there's one scale per row, so Two things worth noting: every other new site in your diff multiplies by That's also the shape I'd hunt for the rest: you fixed On the harness defaulting to the "production optimization stack"
What I can't doI have no GPU here, so I can't reproduce the blue screen or test the CUDA path — everything above is static review plus the CPU side. And I don't have g64 weights locally, so I can't run the model end to end on fmt=4. What I can do: review any CUDA diff you push, and extend the oracle to whatever kernel you want pinned down. Take your time on this one. It's worth more than the tok/s number in the title. |
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yep this one is going to take a lot of figuring out, ill update the repo and push it to dev in a minute, the smoke/quality tests are currently running on the model, its got about 2 hours left. |
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there we go, enjoy :D hopefully you can make progress. |
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the tests you requested should be done shortly, will post results. |
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id also like to point out that while the gs64 does not have the repetition issues discussed, it does have other issued that i havent figured out yet, it seems to put stop tokens into the conversation or something, the output is good but there is added stuff on the end of that output that i havent figured out yet. i thought it was the stop token getting garbled but not sure that is the case. the tests ive done so far(not many due to cpu usage) have all turned back good content, the repetition is not there, but like i said there is just junk on the end of the responses, like "b)9" etc.. also this model seems to use more resources and is a lot heavier than the other model, even though it runs better. although it did get the expert down to sub 8 seconds. |
First quality benchmark: fmt=4 grouped int4 (gs=64) — 80% hellaswag acc_normThe eval harness ran successfully on CPU (no CUDA — see the crash analysis above). First results from the g64 model: What this means80% acc_norm on hellaswag is a strong result. For context:
This confirms the core thesis of #225: group-scale quantization (gs=64) preserves quality far better than per-row scales. The g64 model is coherent, produces correct output, and scores well on standard benchmarks. Caveats
What works
Recommended next steps
The gs=64 format is validated. The quality is there. The bottleneck is compute speed for evaluation, which the CUDA path would resolve. |
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im officially blocked by cuda, i can not progress any more till its correctly working. the outputs are taking to long for testing etc, it took 57 minutes to answer 5 SHORT questions. |
Dev refactored glm.c → colibri.c and extracted the matmul/quant kernels into quant.h (matmul, matmul_q, matmul_i4, matmul_i4_grouped, matmul_i2, quant_scratch, dot_i4i8, matmul_q_idot, matmul_i4_idot, etc. all live there now). The original JustVugg#298 commit re-added all of these inline; on rebase they became duplicate definitions. Resolution: - Removed the ~700-line duplicate block (everything dev moved to quant.h) - Kept ONLY the unique fmt=4 contribution: matmul_i4_grouped_pair (the fused gate+up kernel that reads x once instead of twice, ~33% decode speedup) + the fmt=4 branch in expert_gate_up that dispatches to it. Dev's expert_gate_up only fused fmt==2; this adds the fmt==4 case. - Forward-declared matmul_i4_grouped_pair before expert_gate_up. - Fixed quant_matmul call site in the ragged attention path (backend_cuda.cu) to pass gs/ng — the kernel signature gained those args in the attention scales fix, but dev's new ragged path called it with the old signature. Build-verified: colibri.exe (CPU + COLI_CUDA) and coli_cuda.dll both compile clean on the rebased branch.
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its great, just means the project is making progress :) its almost ready ill have the ai post a message in about 10-15 mins. |
…ion hook Dev split coli_cuda_tensor_upload into two symbols: the plain 7-arg tensor_upload (no gs) for fmt!=4, and tensor_upload_g (8-arg, with gs) for fmt=4 grouped. The DLL-side _g sets a g_upload_gs global the plain upload reads internally. Adapted all call sites: - colibri.c: qt_cuda_upload already dispatches (_g for fmt=4, plain otherwise) — kept dev's version. layer_cuda_shard_kvb was calling the plain upload with gs; switched to tensor_upload_g. - backend_loader.c: the C-API wrapper matches dev's 7-arg signature; tensor_upload_g dispatched separately. - backend_cuda.cu: cache-hit check uses g_upload_gs (not a gs param); coli_cuda_matmul dispatches _g when gs>0; the grouped-expert host fallback quant_matmul calls pass gs=0,ng=1 (host tier is per-row). - Kept dev's fault-injection hook, scale_count field, and fmt=4 support in the grouped-expert path (all_q4/any_g4 tracking). - tests: kept dev's comprehensive tensor_upload test (cached reuse, temp-buffer survival, upload-failure accounting, fault injection). Build-verified: colibri.exe + coli_cuda.dll both compile clean.
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@JustVugg @woolcoxm — rebase is done and verified, and while testing on Blackwell I found something that I think settles whether this PR is still needed. #298 fixes a correctness bug that's currently live in
So #451's expert-group kernels are correct, but the resident-dense fmt=4 path on Rebase status (onto post-#391 I'd asked earlier how you'd prefer this to land (woolcoxm rebases #298, or I open a superseding PR from my fork crediting him), and didn't want to push either branch without your call — I know there's been a lot in flight with the release and #451/#431. Since this now fixes a live correctness regression for g64-on-GPU, can we settle the mechanics and get it in? Ready to push the moment you say which path; happy to share the diff or pinpoint the exact broken line in the dense path. |
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Confirmed independently — I traced the exact broken lines in
Mechanics — let's keep it simple:
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Tested woolcoxm's rebase ( The exact config that produces
So the dense grouped-scale path is correct now under |
… conflicts Combined resolution: mir_pread/st_prefetch_rep (this PR) now carry dev's DISK-CLASS accounting unwind (dc_wall_exit) and O_DIRECT prefetch skip (g_direct); direct-path keeps dc_direct=1 plus the mirror read counters. Verified: clean build, token-exact tiny models unchanged, test_st_mirror and test_st_pread pass. Co-Authored-By: Claude Opus 4.8 <noreply@anthropic.com>
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Independent corroboration — gs=128 on a 72 GB Blackwell (RTX PRO 5000, sm_120) Reproduced @mohamedmastouri2000-boop's
Exactly as diagnosed: with dense resident on GPU, the fmt=4 dense matmul ( Confirms this is a live correctness fix, not an optimization: it bites Env: |
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merged in dev let me know if work now! |
…rom two drives at once Reads experts alternating between two copies of the model on separate drives (COLI_MODEL_MIRROR=/path), roughly doubling streaming bandwidth on disk-bound machines — the primary bottleneck for large-MoE decode. Adds mir_pread/st_prefetch_rep with per-replica byte/read counters (g_mir_bytes/g_mir_nread), a size/header sanity check that skips mismatched mirror copies, and test_st_mirror. Rebased by maintainer onto post-#298/#192 dev: mir_pread now carries dev's DISK-CLASS accounting unwind and the O_DIRECT prefetch skip; direct path keeps dc_direct=1 plus the mirror counters. CI-fix: removed an accidentally-committed test_st_pread binary that broke make check on fresh checkouts. Verified: clean-checkout make check green (linux/macos/windows), token-exact tiny models unchanged. Thanks @steve-m.
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Confirmed working on current RTX 5080 (sm_120), g64 container (grouped int4, fmt=4),
The per-group-scale fix holds on top of the later changes in that area. Thanks for driving it in! |
The Metal GEMV shader (mm_gemv, backend_metal.mm) handled fmt 0-3 only. Anything else -- including dev's grouped-int4 format (fmt=4: packed int4 nibbles, same layout as fmt=2, but one f32 scale per `gs`-element group along I instead of one scale per row; CPU reference matmul_i4_grouped in quant.h, active CUDA tier in JustVugg#298/JustVugg#451) -- fell through the shader's unconditional `else` arm and was decoded AS RAW F32. This was a silent-wrong-answer defect, not just a missing- acceleration gap: bind_gemv (used by the fused decode-attention kernels, coli_metal_attn_decode/coli_metal_layer_decode) accepted a per-weight fmt from its caller with no validity gate at all, so any fmt=4 dense/attention tensor reaching that path would "succeed" (ok=1) while silently computing garbage. coli_metal_matmul/coli_metal_gemm had explicit fmt<=3 gates and so safely rejected fmt=4 (0/CPU-fallback); bind_gemv had no such safety net. COMMIT ORDERING (bisect-safety, see PR_BODY.md sec 1 for the full argument): this commit lands FIRST, before the qt_from_disk allocator fix (next commit). At this commit alone, the capability is CORRECT but INERT: qt_from_disk's fmt=4 scale buffer is still allocated with a bare falloc() (unregistered, not page-aligned), so resolve() in backend_metal.mm can never find it, and every real fmt=4 dense/ attention tensor's scale buffer permanently misses bind_gemv/ coli_metal_gemm regardless of what this commit adds to the shader -- safe CPU fallback, not a wrong answer. No commit in this branch is ever "the shader is fixed but a scale buffer resolves to the wrong/stale allocation" -- fixed-but-unreachable, then reachable-because-fixed, in that order, never the reverse. Verified empirically at this exact commit (this branch, this session): both METAL=0/METAL=1 build clean, 0 warnings, and `make metal-test` passes 27/27 -- metal-test's fmt=4 cases construct their own tensors directly via posix_memalign + coli_metal_register (never through qt_from_disk), so none of them depend on the allocator fix landing first; the capability this commit adds is exercised and proven correct here, just not yet reachable from a real loaded model. Shader: unlike fmt 1-3 (single `acc * scale[o]` after the full dot product), fmt=4's group scale must be folded into the accumulation per-group, before summing across groups -- this is matmul_i4_grouped's actual math, not a simplification. New `constant int& gsz [[buffer(9)]]` parameter carries the group size (ignored, harmlessly, for fmt!=4). Each of the 32 SIMD lanes owns one packed byte (2 elements) per 64-wide stride -- memory access stays coalesced and a group never splits a byte (gs is always even, per the loader's candidate list). Deliberately not vectorized like fmt=2's uchar4/float4 path -- see PR_BODY.md sec 7 for why that tradeoff was made on purpose. Host plumbing: gs threaded through every path that reaches mm_gemv -- coli_metal_matmul, coli_metal_gemm, and bind_gemv (-> AttnW -> coli_metal_attn_decode / coli_metal_layer_decode) -- plus the colibri.c call sites (matmul_qt_ex's Metal-GEMM gate now includes fmt==4; attention_rows/layer_forward_rows pass .gs alongside each .fmt already being passed, a no-op for every model not using fmt=4). fmt_bytes and the new fmt_scale_bytes fix coli_metal_matmul's scale-buffer wrap size, which was previously hardcoded to O floats (wrong for fmt=4's O*ceil(I/gs)). kv_b (MLA absorption core) and the batched routed-expert MoE path (moe_gemv/coli_metal_moe_block) are deliberately untouched -- both already gate fmt=4 to a safe CPU fallback today, and extending them is a structurally separate kernel family; see PR_BODY.md sec 7 for the full scope statement. Tests (tests/test_backend_metal.mm): new cpu_ref_grouped (double- precision oracle mirroring matmul_i4_grouped, same construction tests/test_i4_grouped.c already established) and run_grouped harness, using a magnitude-relative tolerance (justified in PR_BODY.md sec 5) instead of the existing ymax-relative convention, since a grouped dot product's cancellation can otherwise misreport as a kernel defect. Covers the spec's shape matrix (I mult/non-mult of 64, I<=64 degenerate, S=1/S>1, outlier-heavy rows) via coli_metal_matmul, one case via coli_metal_gemm (the large-batch path), and two via a new run_attn_grouped harness that exercises the real fused-attention bind_gemv path end-to-end (not just the standalone kernel entry point). (These two attn cases have known blind spots as first committed here -- closed two commits later, see that commit's message and PR_BODY.md sec 10; kept as originally written here for bisect fidelity.) make metal-test: 15/15 (stock e9b3614) -> 27/27 (12 new fmt=4 cases; original 15 unchanged -- the negative control). make glm METAL=0/ METAL=1: clean, 0 warnings, both before and after. make test-c / test-python: unaffected, all pass. Full gates, evidence classes, and DEVIATIONS/UNCERTAINTIES in PR_BODY.md (untracked, worktree root). (cherry picked from commit f0fa5a9) (cherry picked from commit 82984cdeef67ede71d48b32f2ddd4734f4622eba)
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Confirmed working on current
The per-group dense fmt=4 fix holds on our config too. Thanks for driving it in! 🎉 |
… semantics The merged JustVugg#298 gave the CUDA kernels per-group scale handling for fmt=4 — without the same semantics a g64 container on Vulkan would decode with per-row scales (the exact bug JustVugg#298 fixed). All three shaders gain a fmt==4 branch: int4 nibble decode with one scale per gs inputs, applied to the packed-word partial (host gates gs to multiples of 8 so a word never straddles a group; per-row scaling is skipped like fmt=5). Group size flows as an explicit parameter through the upload-triggering entries into ColiVkTensor and the push constants; engine call sites pass QT.gs and the VK gates accept fmt=4 via VK_FMT_OK (word-aligned gs only — anything else stays on the CPU path, which JustVugg#298 already fixed). Harness: ref helpers generalized to runtime group size (g_ref_gs); fmt=4 cases at gs=64 across the real shapes (dense, o-proj, batch, expert_group, matmul_pair, absorb incl. S=2 causal + window) plus a gs=32 sanity case.
… semantics The merged JustVugg#298 gave the CUDA kernels per-group scale handling for fmt=4 — without the same semantics a g64 container on Vulkan would decode with per-row scales (the exact bug JustVugg#298 fixed). All three shaders gain a fmt==4 branch: int4 nibble decode with one scale per gs inputs, applied to the packed-word partial (host gates gs to multiples of 8 so a word never straddles a group; per-row scaling is skipped like fmt=5). Group size flows as an explicit parameter through the upload-triggering entries into ColiVkTensor and the push constants; engine call sites pass QT.gs and the VK gates accept fmt=4 via VK_FMT_OK (word-aligned gs only — anything else stays on the CPU path, which JustVugg#298 already fixed). Harness: ref helpers generalized to runtime group size (g_ref_gs); fmt=4 cases at gs=64 across the real shapes (dense, o-proj, batch, expert_group, matmul_pair, absorb incl. S=2 causal + window) plus a gs=32 sanity case.
Retarget PR JustVugg#377 onto current dev (origin/dev @ 4aca059) after JustVugg#391 split glm.c into colibri.c + quant.h/sample.h/kv_persist.h/telemetry.h. Reconciles four collisions: - JustVugg#391 split: all glm.c hunks resited -- prof_*/g_prof_io/ProfBase live in colibri.c (NOT telemetry.h); tiers_emit/emap_emit -> telemetry.h (with a rammap_slot forward-decl); st_fd_is_tmpfs/st_fd_fs_magic -> st.h; .coli_kv state-dir -> serve_ctx_init/run_serve/run_serve_mux + main. - DISK-CLASS (1f00142): prof_physical_read_bytes/ProfPhysicalWire merged ON TOP of dev's dc_* fields; PROF protocol line extended 9->17 fields additively; expert_load_impl 6-arg `demand` signature preserved; g_prof_io routed through prof_ssd_tensor_bytes (tmpfs-excluded). - DUAL-SSD mirror (JustVugg#298/JustVugg#469): ESlot.backing hand-merged with dev's aslab/afslab; map_of_fd exact-length + MADV_HUGEPAGE composes with rep_bfd. - int3 fmt=5 (JustVugg#168): rammap_bind_one reuses dev's qt_resolve_fmt/detect_group_size (inline fmt-detection dropped; duplicate detect_group_size not re-added). Verified: make colibri 0 warnings; make check 187 tests pass (test_uring skips in sandboxes via the PR's helpers; test_rammap builds against colibri.c and passes). Default path byte-identical -- oracle-safe by construction. Co-Authored-By: Claude <noreply@anthropic.com>
4 participants
Summary
Adds complete support for the new grouped-int4 (fmt=4, gs=64) model format across the CUDA backend, engine dispatch, and dequant helpers. Also adds a fused gate+up kernel for fmt=4 and a comprehensive diagnostic harness.
Problem
The new g64 model quantizes experts with group-size 64 — one f32 scale per 64 elements instead of one per row. The existing code only supported fmt=2 (per-row int4). Three things broke:
row_bytes(fmt=4)returned 0, so every tensor upload failed silently → every dense tensor fell back to CPU → 0.05 tok/s (20x regression)matmul_i4_pairgates onfmt==2only, so fmt=4 did 2 separate passes → expert-matmul 2x slowerembed_row,qt_addrow,qt_matvec_rows, kv_b shard computation — latent correctness bugsChanges
CUDA backend (
backend_cuda.cu)ColiCudaTensor: addedgs/ngfieldsrow_bytes/weight_at: fmt=4 = same packed int4 layout as fmt=2quant_matmulkernel: per-group scale application for fmt=4tensor_upload/tensor_update: allocateO*ngscales for fmt=4tensor_free/tensor_bytes: VRAM accounting usesO*ngexpert_group: returns 0 for fmt=4 (falls back to correct per-expert path)quant_matmul<<<>>>call sites passgs,ngEngine (
glm.c)matmul_i4_grouped_pair(new): fused gate+up for fmt=4 — reads x once instead of twiceexpert_gate_up: dispatches to fused grouped pair for fmt=4run_text: prepend[gMASK]<sop>for GLM models (Quality benchmark (the one you asked for): int4 GLM-5.2 scores 62.5% mean acc_norm — but the scoring protocol is a confound; here's the experiment that would settle it #108 — PROMPT mode generated garbage without it)embed_row,qt_addrow,qt_matvec_rows: fmt=4 branchesrb: fmt=4 caseAPI (
backend_cuda.h,backend_loader.c)coli_cuda_tensor_uploadandcoli_cuda_matmul: addedgsparam, threaded through DLL boundaryTests
bench_tensor_core.cu,test_backend_cuda.cu,test_pipe_cuda.cu: updated to new API signatureNew:
c/tools/diag_harness.pyComprehensive diagnostic harness — system probe, correctness smoke (12 prompts), deep PROFILE diagnostic, quality benchmarks (hellaswag/arc/mmlu via eval_glm.py), throughput (MTP on/off). Outputs JSON + Markdown reports.
Performance (GLM-5.2 744B g64 / RTX 5070 Ti / 32GB RAM)
route_agree: 95.3%confirms quality preserved.Test plan
The capital of France is→Paris