Added build for -6 part

Author: LucAce

.gitignore

@@ -1,4 +1,4 @@
-prj/top/impl1/
+prj/top/impl1*/
 prj/top/top_tcr.dir/
 prj/top/*.ini
 prj/top/*.xml

prj/top/top_LCMXO2-1200HC-4SG32C.ldf

@@ -1,7 +1,7 @@
 <?xml version="1.0" encoding="UTF-8"?>
 <BaliProject version="3.2" title="top" device="LCMXO2-1200HC-4SG32C" default_implementation="impl1">
     <Options/>
-    <Implementation title="impl1" dir="impl1" description="impl1" synthesis="lse" default_strategy="Strategy1">
+    <Implementation title="impl1" dir="impl1-4SG32C" description="impl1" synthesis="lse" default_strategy="Strategy1">
         <Options def_top="top"/>
         <Source name="../../rtl/ctrl.v" type="Verilog" type_short="Verilog">
             <Options/>

prj/top/top_LCMXO2-1200HC-6SG32I.ldf

@@ -1,7 +1,7 @@
 <?xml version="1.0" encoding="UTF-8"?>
 <BaliProject version="3.2" title="top" device="LCMXO2-1200HC-6SG32I" default_implementation="impl1">
     <Options/>
-    <Implementation title="impl1" dir="impl1" description="impl1" synthesis="lse" default_strategy="Strategy1">
+    <Implementation title="impl1" dir="impl1-6SG32I" description="impl1" synthesis="lse" default_strategy="Strategy1">
         <Options def_top="top"/>
         <Source name="../../rtl/ctrl.v" type="Verilog" type_short="Verilog">
             <Options/>

prj/top/top_impl1_r03.jed prj/top/top_impl1-4SG32C_r03.jedprj/top/top_impl1_r03.jed renamed to prj/top/top_impl1-4SG32C_r03.jed

@@ -2,7 +2,7 @@
 NOTE Diamond (64-bit) 3.11.0.396.4 JEDEC Compatible Fuse File.*
 NOTE Copyright (C), 1992-2010, Lattice Semiconductor Corporation.*
 NOTE All Rights Reserved.*
-NOTE DATE CREATED:	Sun Feb 16 22:23:47 2020*
+NOTE DATE CREATED:	Sun Feb 16 22:43:25 2020*
 NOTE DESIGN NAME:	top_impl1.ncd*
 NOTE DEVICE NAME:	LCMXO2-1200HC-4QFN32*
 NOTE JEDEC FILE STATUS:	Final   Version 1.95*
@@ -2721,4 +2721,4 @@ E0000000000000000000000000000000000000000000000000000000000000000
 0000010000100000*
 NOTE User Electronic Signature Data*
 UH00000000*
-8121
+811F