[pull] main from llvm:main - #1682
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…212157) Add the absolute (R_SPARC_8/16/UA16, R_SPARC_13, R_SPARC_HIX22/LOX10), PC-relative (R_SPARC_DISP8/16/64, R_SPARC_WDISP16/19/22) and GOT (R_SPARC_GOT13) forms. The assembler emits these, but lld reports "unknown relocation". Since aff950e, R_SPARC_LO10, R_SPARC_HM10 and R_SPARC_L44 clear the whole simm13 field while writing only its low 10, 10 and 12 bits, dropping bits that GNU ld preserves. Narrow each mask to the bits it writes. Give R_SPARC_PC22 its own case, as a displacement needing a range check. Express the R_SPARC_HI22 and R_SPARC_H44 checks in terms of the unshifted value to improve the diagnostic, and drop the R_SPARC_HH22 check, which no 64-bit value can fail. Co-authored-by: Kirill A. Korinsky <kirill@korins.ky> Co-authored-by: LemonBoy <thatlemon@gmail.com> Co-authored-by: Alex Rønne Petersen <alex@alexrp.com> Co-authored-by: Kirill A. Korinsky <kirill@korins.ky> Co-authored-by: LemonBoy <thatlemon@gmail.com> Co-authored-by: Alex Rønne Petersen <alex@alexrp.com>
…0898) Implement `getConstraintRegister` so Clang can diagnose inline asm register clobber conflicts for LoongArch, matching GCC.
Remove the unused return value of addReloc and simplify the control flow for linker relaxation and PC-relative relocation handling.
Also fix a bug in index::getSymbolKind where the returned symbol kind would be Class for a struct template. Fixes clangd/clangd#2684
…lt (#212161) SPARC dynamic linker finds _DYNAMIC by dereferencing the GOT pointer register (glibc elf_machine_dynamic), so reserve .got[0] for it. It resolves a PLT entry by rewriting the entry's instructions (glibc sparc64_fixup_plt), so R_SPARC_JMP_SLOT applies to .plt and there is no .got.plt. Add TargetInfo::usesGotPlt, which SPARC sets to false, and use it to place the relocation and derive the sh_info of .rela.plt. The four reserved PLT entries stay zeroed, as with GNU ld; the dynamic linker fills in .PLT0 and .PLT1 at startup. Co-authored-by: Kirill A. Korinsky <kirill@korins.ky> Co-authored-by: LemonBoy <thatlemon@gmail.com>
…umeCoroFree. (#211970) The previous #184466 didn't fix the PGO profile in select instruction in [replaceSwitchResumeCoroFree](https://github.com/jinhuang1102/llvm-project/blob/98668ee1485aa47e97cbb900bc22e0d9e1c8d795/llvm/lib/Transforms/Coroutines/CoroSplit.cpp#L207) function in `CoroSplit.cpp` so triggered a profile verification failure: https://lab.llvm.org/buildbot/#/builders/223/builds/7899 This PR attach unknown branch weights to the created `select` instruction see the comment for more information. Cmake config: ``` cmake -GNinja -DCMAKE_BUILD_TYPE=Debug -DLLVM_ENABLE_ASSERTIONS=ON -DCMAKE_C_COMPILER_LAUNCHER=ccache -DCMAKE_CXX_COMPILER_LAUNCHER=ccache -DLLVM_LIT_ARGS=--exclude-xfail -DLLVM_ENABLE_PROFCHECK=ON ../llvm-project/llvm ``` Verified by ``` $ bin/llvm-lit -v /usr/local/google/home/jingold/llvm-project/llvm/test/Transforms/Coroutines -- Testing: 170 tests, 128 workers -- PASS: LLVM :: Transforms/Coroutines/coro-spill-defs-before-corobegin.ll (1 of 170) ... PASS: LLVM :: Transforms/Coroutines/coro-split-resume-entry-count.ll (121 of 170) PASS: LLVM :: Transforms/Coroutines/coro-split-resume-entry-count-no-suspend.ll (149 of 170) PASS: LLVM :: Transforms/Coroutines/coro-split-resume-fallthrough-destroy-slot.ll (155 of 170) ... PASS: LLVM :: Transforms/Coroutines/coro-readnone-02.ll (170 of 170) Testing Time: 0.70s Total Discovered Tests: 170 Passed: 170 (100.00%) ``` Co-authored-by: Jin Huang <jingold@google.com>
…ABI (#205027) RISC-V's ABI states that, aside from V extension state, only a0 and t0 are clobbered by TLSDESC resolvers. The original specification was to also not clobber any V extension state, but due to implementation concerns an ABI-breaking change has been made[1] to clobber all V extension state. This patch adds V-regs/csrs clobbering to the existing PseudoLA_TLSDESC and PseudoTLSDESCCall in RISCVInstrInfo.td, as well as an additional test covering the V-register clobber and V-CSRs clobber cases. [1] riscv-non-isa/riscv-elf-psabi-doc#496
Add value-preserving folds mirroring LLVM's InstructionSimplify for the integer shift ops: ``` shli/shrui/shrsi(0, x) -> 0 shrui/shrsi(x, x) -> 0 shrsi(-1, x) -> -1 ``` A shift amount greater than or equal to the bit width yields poison, so refining these cases to a constant is valid. For `shr(x, x)` any in-range amount `v` satisfies `v >> v == 0 (v < 2^v)`. Folding an out-of-range shift amount (`c >= bit width`) to poison is left as a TODO: it would make the arith dialect depend on the ub dialect to materialize `ub.poison`. LLVM performs the same simplifications: https://godbolt.org/z/7hsMz9E7Y Verified with Alive2: | Fold | shl | lshr | ashr | | :--- | :---: | :---: | :---: | | `0 << x`, `0 >> x -> 0` | [✓](https://alive2.llvm.org/ce/z/Sz2fT1) | [✓](https://alive2.llvm.org/ce/z/mlq7k6) | [✓](https://alive2.llvm.org/ce/z/jbeNH9) | | `x >> x -> 0` | — | [✓](https://alive2.llvm.org/ce/z/JCPBCZ) | [✓](https://alive2.llvm.org/ce/z/YLjo3M) | | `-1 >> x -> -1` | — | — | [✓](https://alive2.llvm.org/ce/z/sT6pNC) | --- Code partially generated by Claude Code. Signed-off-by: Víctor Pérez Carrasco <victor.pc.upm@gmail.com>
…of line. NFC (#212145) DominatorTreeBase defines some functions that call into into DomTreeBuilder, whose algorithms live in GenericDomTreeConstruction.h. A translation unit including only GenericDomTree.h inlines the member and calls the algorithm, which just Dominators.cpp provides, through ten explicit instantiations. Elsewhere the algorithm survives only where the inliner leaves a use of it. A previous revision of #212098 gave LoopInfoBase a member calling recalculate, so instantiating LoopInfoBase in CFGLoopInfo.cpp referenced an algorithm that no translation unit defines: ``` ld.lld: error: undefined symbol: void llvm::DomTreeBuilder::Calculate<llvm::DominatorTreeBase<mlir::Block, false>>(llvm::DominatorTreeBase<mlir::Block, false>&) >>> referenced by CFGLoopInfo.cpp ``` Define those members in GenericDomTreeConstruction.h. Such a caller then calls the member out of line, and the explicit instantiation of the class that each dominator tree owner already has emits it. Negligible size decreases for all of opt/llc/mlir-opt/llvm-bolt Aided by Claude Opus 5
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