[pull] main from llvm:main - #1684
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…211203) per [#210738](#210738 (comment)) Currently, the following crashes on verification with a segfault: ``` func.func @broadcast_rank0_tensor(%arg0: tensor<i32>, %arg1: tensor<32x2xi32>) -> tensor<32x2xi32> { %0 = linalg.broadcast ins(%arg0 : tensor<i32>) outs(%arg1 : tensor<32x2xi32>) dimensions = [0, 0] return %0 : tensor<32x2xi32> } ``` The verifier should reject cases like this where we have a duplicate dimension. I've also added a couple of tests covering `linalg.broadcast` on various input scenarios to confirm they are being handled properly.
Commit 01683db generalized the Session's dispatch mechanism to hand each runner an opaque Task (move_only_function<void()>), and simplified QueueingRunner accordingly, but failed to update ThreadPoolRunner. Update ThreadPoolRunner to conform to Session's dispatch requirements and update its unit test to dispatch plain tasks rather than wrapper-function calls.
PR #209196 split host memory allocations into a dedicated API. Update SYCL to use the new host allocation function introduced by that change.
…8224) Add a visited set so an SSA cycle through a loop-carried phi does not hang the worklist walk
When hoisting spills and the source is a PHI, the "hoisted" spill may be inserted only after the basic block prologue. This may require extending this segment of the source value's live interval. Abort the hoisting if this extension of the segment would interfere with another live interval assigned to the same physical register. Signed-off-by: Lukas Sommer <lukas.sommer@amd.com>
Add options -amdgpu-stress-vgpr=N, -amdgpu-stress-agpr=N, and -amdgpu-stress-sgpr=N to limit each register class independently by reserving registers beyond N.
Handle memmoves of constant lengths up to 256 bytes with target instructions instead of libcall.
…endModule() (7/7) (#211536) RFC https://discourse.llvm.org/t/rfc-dwarfdebug-fix-and-improve-handling-imported-entities-types-and-static-local-in-subprogram-and-lexical-block-scopes/68544 This patch proposes to move the emission of types and type-like entities from `DwarfDebug::beginModule()` to `DwarfDebug::endModule()`. Effectively, this changes nothing but the order of debug entities in the resulting DWARF. This is needed to simplify DWARF emission in a context of proper support of function-local types, making all the types handled in a single place, together with other global and local entities. This change has already been reviewed and approved in https://reviews.llvm.org/D144008, but I’m opening a new PR for visibility. Co-authored-by: Kristina Bessonova <kbessonova@accesssoftek.com>
This disables Windows' default debug heap when launching a process. The motivation is similar to what Microsoft wrote on their [blog post for Visual Studio 2015](https://devblogs.microsoft.com/cppblog/c-debugging-improvements-in-visual-studio-14/) where they disabled it: The debug heap comes with a performance cost and the [C runtime already does some heap checking](https://learn.microsoft.com/en-us/cpp/c-runtime-library/crt-debug-heap-details?view=msvc-170). Towards #201690. Notably, lldb-dap won't set this when launching in a terminal. I think we'd want an option similar to `disableASLR` for lldb-dap.
In the test `switch_remove_dead_cases`, both case 4 and case 5 jump into bb `%case_ret`. Thus, the edge will be removed twice, triggering an assertion failure. This patch only removes the edge in DT when we remove the last edge to `DeadCaseBB`.
vloada_halfn was incorrectly mapped to vload_half builtin number (174) instead of its own (179), causing it to demangle to the wrong OpenCL builtin
…209775) Round up the shrunk load element count to the next full vector register boundary to avoid scalar remainders that prevent shuffle lowering. For example, on X86 AVX-512 a <16 x double> load with shuffle indices 1-8 was shrunk to <9 x double>. This legalizes to v8f64 + scalar f64, and the scalar operand in BUILD_VECTOR prevents DAGCombiner from folding it into a VECTOR_SHUFFLE, producing ~15 instructions instead of 2 (VMOVDQA64 + VALIGNQ).
`aarch64/inline_memset.h` defines type aliases `uint128_t`, `uint256_t` and `uint512_t` at file scope. `aarch64/inline_memmove.h`, alongside it, defines the same aliases at function scope. If both headers are included by the same source file, this can lead to a warning about the function-scope aliases shadowing the file-scope ones, which turns into a compile error if you build with `clang -Werror -Wshadow`. Commit a81db64 (PR #210895) exposed this latent compile failure, by making `CPP/string.h` include both files. But there's nothing wrong with that, so the right fix is to make it _safe_ to include both files, not to stop doing it. This commit moves the function-scope aliases in memmove up to file scope. That makes them duplicate definitions in the _same_ scope, which doesn't cause the same error. Other options would be to move the memset aliases down into function scope (duplicating them in two functions), or to move them into a tiny AArch64-specific header file with an include guard. Both of those are more intrusive than this fix.
…12219) `ProcessWindows::OnExitProcess` unloads the executable module with `delete_locations=true`, which deletes the target's breakpoint locations when the debuggee exits. Other platforms keep them, so inspecting a breakpoint after the process died returns no location on Windows. Pass `delete_locations=false` to match the other platforms.
```
int foo(){
int i = 42;
int j = 43;
auto l1 = [x = i, &j ](){};
}
```
in the lambda capture:
- `x` is visited as VariableRef (referencing an unvisited VarDecl at the
same location)
- `i` is visited as DelcRefExpr (fair enough, same as in an assignment)
- `j` is visited as VariableRef
Visit `x` as a `VarDecl`, and stop visiting it as a `VariableRef`, as it
makes no sense (referencing itself at an unvisited cursor).
---------
Co-authored-by: Serafean <Serafean@users.noreply.github.com>
…LT (#212247) This is a bug since G_EXTRACT_VECTOR_ELT will end up with a register class on the dst operand. The combiner will crash because of it.
…209179) When multiple VGPR-requiring uses of an MFMA dst are in the same block as the MFMA, share a single AGPR->VGPR copy placed before the earliest use, instead of creating one per use.
…212140) Currently we fully decompose expressions, collect all preconditions and then bail out if any precondition is false. This means we miss out on simplifications in cases where the precondition does not hold, but we could still reason about the un-decomposed sub-expression. This patch updates `decompose` to take the constraint system as argument instead and eagerly check preconditions. If the precondition does not hold, we don't decompose the sub-expression and don't further recurse, but simply treat the sub-expression as variable. This improves results in some cases (dtcxzyw/llvm-opt-benchmark-nightly#794) and is also slightly cheaper (or neutral) in most cases compile-time wise, as we cut off decomposition before recursing further. The number of queries for preconditions overall should stay the same PR: #212140
This fixes 98d41d2 (#212126). Buildkite error link: https://buildkite.com/llvm-project/upstream-bazel/builds?commit=98d41d2f75395ab1f91198f2493cff62a33b80c1 Co-authored-by: Google Bazel Bot <google-bazel-bot@google.com>
The final value of a linear iteration variable must be the loop limit_value + step. Before this patch it was limit_value. Fixes #170784.
Preserve AA metadata when folding select of masked.load to masked.load. We cannot preserve value metadata, as it may not be valid for the new passthru. Fixes #209022. Assisted-by: Claude
…sults (#209791) Elemental operands are conformable, so their extents are identical and the result shape may be taken from either operand. This patch prefers an operand whose shape is a compile-time constant, producing a statically shaped result. The left operand is checked first to avoid churn in lit test expectations.
…07404) The DIL assignment path (`frame variable 'lhs = rhs'`) routes through `ValueObject::SetValueFromInteger`, which verifies that the new value fits in the destination type before writing it. That size check compared the source `APInt`'s raw 64-bit word, treated as an unsigned value, against the destination type's unsigned maximum: ``` uint64_t u_max = (1 << (byte_size * CHAR_BIT)) - 1; if (*(value.getRawData()) > u_max) return llvm::createStringError("Illegal argument: new value is too big"); ``` This is wrong in both directions: * Small negative values that fit are rejected. A literal such as `-2` has a 32-bit `APInt` of `0xFFFFFFFE`, whose raw word is `0xFFFFFFFFFFFFFFFE`. Compared as unsigned against a short's `0xFFFF` it looks "too big", so ``` (lldb) frame variable 's = -2' error: Illegal argument: new value is too big ``` even though -2 fits a `short`. * Positive values that overflow the signed range are accepted and silently wrap and stored a value that displayed as `-32768`. ``` (lldb) frame variable 's = 32768' (short) s = -32768 ``` Check the number of significant bits with respect to the destination's signedness instead: `getSignificantBits()` for a signed destination and `getActiveBits()` for an unsigned one. This accepts the valid range (`[-32768, 32767]` for a signed short) and rejects everything outside it. Also extend the value before building the `DataExtractor` used to write it. The extractor reads exactly `byte_size` bytes from the `APInt`'s raw storage, so a value narrower than the destination must be extended to cover the full read. Use a sign extension so negative values keep their value in the wider destination. Extends the DIL assignment API test (`TestFrameVarDILAssign`) to cover assigning negative and boundary values to the existing `short` variable: `-2`, `-4` (from `int j`), and the `[-32768, 32767]` boundaries are accepted, while `32768` and `-32769` are rejected. Without the fix these narrow-type assignments either fail with "new value is too big" or silently wrap.
`legalizeOperandsVALUt16` iterates over all operands except for the zeroth one, as the zeroth one is typically a definition. However, if the zeroth operand is an input (e.g., for a `V_CMP`), then this causes the compiler to generate illegal machine code. This patch extends `legalizeOperandsVALUt16` to apply also to the zeroth operand, guarding for when this operand is a definition.
…on (#211895) It is never checked whether a candidate loop `L` is latched by a compare instruction, yet `L.getLatchCmpInst()` is added to the `Roots` for `containsUnreachable`. If a loop is predicated on anything other than a compare instruction, `getLatchCmpInst()` returns `nullptr`, causing `containsUnreachable` to crash when calling `isa<PHINode>`. To fix, consider loops where `L.getLatchCmpInst()` is null to be not in canonical form, and reject them. - Crash: https://godbolt.org/z/Tboo4jo5Y Assisted-by: Claude Opus 5
As requested on #207166, this change adds information about hardware features that can help or hinder porting LLDB. I decided not to add an explicit "help" or "hinder" tag to them because the descriptions are pretty general and I'd rather people took them as starting points to think for themselves. Debugging is a pile of things working together, so it's hard to say that lack of one thing is "bad" without seeing it in context. Hopefully by thinking about all these items for their target, developers will be able to do that.
…aracters. (#211934) In Clang Tooling, escape HeaderStem before constructing MainIncludeRegex to prevent special characters (such as '+') from being interpreted as regex operators. Useful for Objective-C where "Foo+Bar.h" headers are very common for categories.
Directly using isRequired is deprecated and PassInfoMixin will soon be moved to a detail namespace. Reviewers: tonykuttai, w2yehia, hubert-reinterpretcast Pull Request: #212018
Extend WalkAST to recognize and report references in Objective-C constructs, including interfaces, protocols, message expressions, properties, categories, compatible aliases, and instance variables. Also update the test helper to support custom compiler arguments and add corresponding unit tests.
…d::ranges::max (#209590) Extend missing coverage and increase consistency across how the benchmarks are written.
DbgInstPtr was needed in the transitionary phase between intrinsics and records, but can be removed now.
…7555) Unlike normal PLT entries, IPLT entries can be called indirectly even when in PIEs/DSOs, and so there's no guarantee on what's in the TOC pointer register at that time. Therefore we must emit variants of the existing code that work without it, whether r12-relative (playing the same role as MIPS's $25) in the same number of instructions, or first retrieving PC in an i386-like manner, being careful not to clobber LR. On 32-bit PowerPC even direct calls to IPLT entries face the same issue, since we'd use the TOC base of the resolver, which may not be the same as the caller, even within the same object. Normal canonical PLTs still look broken on 64-bit PowerPC as they use the TOC pointer register too, and similarly on 32-bit PowerPC for PIEs. We should probably treat these cases the same as PIE on i386 (except including PDEs for 64-bit PowerPC), where it's an error due to the use of %ebx in PLT entries.
The current legalisation for SGPR/VGPR copies with mismatched sizes does not check which VGPR subregister is used, and defaults to using `lo16`. If the `hi16` subregister is used instead, this information is lost, and the subregister is incorrectly replaced with `lo16`. This patch retains the subregister used when legalising the copy.
Previously isCPUStringValid was virtual so TableGen could emit an AArch64 specific hack for recognizing cpu aliases. Teach tablegen about aliases, and insert each alias into the CPU subtype table as its own entry (sorted by name, carrying the canonical processor's features and scheduling model). There is further opportunity for code sharing improvements. AArch64's aliases are consumed by ARMTargetDefEmitter to emit a custom inc file in TargetParser which should be universalized. Co-authored-by: Claude (Claude-Opus-4.8) <noreply@anthropic.com>
Older targets have aliasing names which were previously implemented by defining a second copy of the processor, identical except for the name Use the recently improved tablegen mechanism for defining name-only aliases. This dedupliates some redundant table entries, like the sched model. Co-authored-by: Claude (Claude-Opus-4.8) <noreply@anthropic.com>
Many X86 processors were defined multiple times under different names, emitting an identical ProcessorModel for each spelling and duplicating the feature masks, tune features, and scheduling model index in the subtype table. Define each processor once under its canonical name and express the alternate spellings with ProcessorAlias, using the tablegen alias mechanism. This deduplicates the redundant subtype table entries and saves about 4.6k with the new alias table (#211952) Co-Authored-By: Claude (Claude-Opus-4.8) <noreply@anthropic.com>
analyze() requires a dominator tree, so LoopAnalysis and MachineLoopAnalysis request one for every function, though only an irreducible CFG queries it. Clients that build their own, from InlineCost to XRayInstrumentation, need it for nothing else. Take the function and a callback returning the tree instead, and call it when an edge re-enters a loop. Add an analyze(F) overload for a client that holds no tree. The number of dominator tree builds does not change in an -O2 pipeline building sqlite3.bc, where SROA and InstCombine cache one before LoopAnalysis runs. Tests that observed the tree through LoopAnalysis now require it explicitly. MachineLoopInfoWrapperPass keeps requiring one: the legacy pass manager cannot provide it on demand. Aided by Claude Opus 5
The upload-release-artifact action uses the require-team-membership action so we need to make sure that latter is checkout out when calling upload-release-artifact.
When following insertelement instruction for a BuildVector sequence, we may discover a user that inserts into a different vector. Bail out when that happens instead of crashing. PR: #212269
This PR adds `DebugTypeArray` to `SPIRVNonSemanticDebugHandler`: 1. `partitionTypes` buckets `DICompositeType` nodes tagged `DW_TAG_array_type` without `DINode::FlagVector` (vectors are emitted separately). 2. `emitNonSemanticGlobalDebugInfo` emits one `DebugTypeArray` per node after the pointer types and records the id in `DebugTypeRegs`. 3. `emitDebugTypeArray` appends one `OpConstant` component count per `DISubrange`, in subrange order. A subrange with no constant count emits 0, matching `OpTypeRuntimeArray`. An array whose element type is not in `DebugTypeRegs` is skipped. Clang lowers a matrix to a `DW_TAG_array_type` with two subranges in `CGDebugInfo::CreateType(const ConstantMatrixType *)`, so an HLSL `float4x4` emits as a `DebugTypeArray` with two counts. `DebugTypeMatrix` needs a distinguishing flag from the frontend. Added a couple of tests in `llvm/test/CodeGen/SPIRV/debug-info/`: 1. `debug-type-array.ll` covers a 1D array, a 2D array, a runtime-sized array, and an array of vectors, and asserts that we are not emitting `DebugTypeMatrix` (this will need to be changed when/if we start emitting them). 2. `debug-type-array-skip-element-not-in-regs.ll` tests arrays of types that cannot have debug info (I used array of pointers wit no DWARF address space).
`lld/test/ELF/lto/sample-profile.ll` is failing in ThreadSanitizer build. In a parallel in-process ThinLTO link, each backend thread reads the sample profile in SampleProfileLoader::doInitialization and writes these globals. Make the variables std::atomic<bool> so the same-value writes are well-defined. An architectural ideal solution that holds these states in a container seems very intrusive.
Add an OpenACC MLIR pass that emits not-yet-implemented messages for unsupported directives immediately after HLFIR generation. This allows OpenACC dialect operations to be emitted with -emit-hlfir while making full compilation fail early with clear diagnostics, instead of later when unhandled OpenACC operations reach LLVM dialect conversion.
…tion types as per CWG1417 (#209836) Abstract declarator contexts (specifically `DeclaratorContext::TypeName`) now properly bypass this restricted rule, allowing cv-qualified function types in `__typeof__` while maintaining restrictions in other contexts like `typeid`, `sizeof`, C-style casts, and `new` expressions per CWG1417.
In #208959 we started dropping RELR relocations for late-added GOT entries when reverting x86-64 GOTPCRELX relaxations in X86_64::relaxOnce. There is a separate unrelaxation bug where if the object files didn't have any relocations of a certain type, we'd prune .relr.dyn (or even .rela.dyn). Will be addressed separately. Assisted-by: Gemini
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