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feat(boards): release the ATtiny85 as preview (P6.5, M3) - #337
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ttbombadil merged 8 commits intoOct 24, 2026
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Port B with INT0 and PCINT0, timer 0 with its own registers and one-word vectors, the ATtiny timer 1, a four-channel ADC that reads REFS2 at bit 4, EEPROM timed for 8 MHz, watchdog and clock prescaler. INT0 and the pin-change interrupt share GIMSK and GIFR, which avr8js wires for one of them only; the profile wraps both hooks. Registered with the board hardware in P6.4. Co-Authored-By: Claude Opus 5.5 <noreply@anthropic.com>
Co-Authored-By: Claude Opus 5.5 <noreply@anthropic.com>
TX is decoded from PB0 with the baud rate found from the edge distances and the bit width measured from them; RX drives PB1 through an analog comparator model. SoftwareUart offers the USART members SerialPorts uses, for the ATtiny85 board. Co-Authored-By: Claude Opus 5.5 <noreply@anthropic.com>
Pins 0-5 as PB0-PB5 with A0-A3 as second names, PWM on 0, 1 and 4, RESET on PB5 and Serial as a software port on 0/1. SerialPorts takes a USART or the software UART, the PWM observation reads timer 1 of the ATtiny85, and the sketch parsers resolve A<n> and analogRead(n) as ATTinyCore does. The pin map is checked against the core in the toolchain gate. Co-Authored-By: Claude Opus 5.5 <noreply@anthropic.com>
Co-Authored-By: Claude Opus 5.5 <noreply@anthropic.com>
DIP-8 board view, LED and analog labels from the board's own names, the sketch's Serial.begin() rate for the software UART, five corpus probes, an end-to-end test and the user guide with the board's limits. The software UART now judges every fitting baud rate on its frames and decodes TX only while Serial is active. M3 acceptance report. Co-Authored-By: Claude Opus 5.5 <noreply@anthropic.com>
Co-Authored-By: Claude Opus 5.5 <noreply@anthropic.com>
…ny tests The gateway deployment test listed the pilot's boards by hand and failed once the ATtiny85 became preview; it now takes them from the catalog. The ATtiny85 board tests stop as soon as their result is there and share one probe run (16.8 s to 5.6 s under coverage). Co-Authored-By: Claude Opus 5.5 <noreply@anthropic.com>
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Paket
P6.5 ATtiny85 freigeben (M) und Abnahme M3. Gestapelt auf #336 → #335 → #334. Die Basis ist
feature/browser-emulation; bis die Vorgänger gemergt sind, enthält der Diff deren Commits mit. Merge-Reihenfolge: #334, #335, #336, dann dieser PR.Abnahmebericht: report-m3-acceptance.md.
Umgesetzt
previewfürattiny85(shared/boards.ts, Laufzeitbrowser).scripts/generate-attiny85-svg.mjs,npm run generate:attiny85-svg,client/public/ATtiny85*.svg, Eintrag inboard-view.ts.LED_BUILTINdes Boards; bisher war sie fest Pin 13 und am ATtiny85 dunkel.analog.name).activeAnalogPinTitle).serialBaud, das der Client ausSerial.begin(<Zahl>)liest (sketchSerialBaud). Der Worker setzt damit die Rückfallrate. Die SSOT SimulationRuntime ist ergänzt; die Änderung ist additiv,PROTOCOL_VERSIONbleibt.attiny_basicsauf 19200 statt 9600 ein: Die schnellere Rate hatte ihre kürzeren Rahmen zuerst voll. Jetzt wird erst entschieden, wenn jede passende Rate 4 vollständige Rahmen hat; die Rate ohne Rahmenfehler (Stoppbit HIGH) gewinnt.digitalWrite(0, LOW)ohneSerialerzeugte ein Byte 0x00 (attiny_pwm_duty). TX wird jetzt nur dekodiert, solangeSerialaktiv ist (Komparator perSerial.begin()an).derived, Begründung jecase.json), HEX-Dateien mitnpm run fixtures:runtimegebaut;CORPUS_FQBNkenntattiny85, die README ist ergänzt.e2e/attiny85.spec.ts: Boardwahl und Ansicht; Compile mit ATTinyCore, Ausgabe und A1 am Board; Eingabe über den Komparator.Serialmit Halbduplex und Pin-Konflikten, Baudrate, Speicher). Dazu SSOT Boards, Plan, Status und der M3-Bericht.Abnahmeevidenz
fixtures:runtime --checkauch für die ATtiny-HEX);npm run buildmit Bundle 691,0 kB von 710 kB;check,lint,knip,check:docs, Pre-Push mit Sonar (S6582, S4624 behoben).npm run emulate, M2 Pro): ATtiny85 11,1–11,2 × Echtzeit (Uno-Blink 4,4 ×).Abweichungen vom Plan
Keine. Zwei Hinweise:
parseInt()ausgibt, verliert die zweite Ziffer, auf dem echten Chip ebenso. Test-Sketch und Benutzerhandbuch lesen deshalb zuerst und antworten danach.software-uart.test.ts(aus feat(emulator): model the software UART of the ATtiny85 (P6.3) #335): Die synthetische Leitung schaltet jetzt den Komparator ein wieSerial.begin(), weil TX nur noch bei aktivemSerialdekodiert wird. Neu ist der Fall „ohneSerialkein Byte“.Geänderte bestehende Tests (freigegeben vom Nutzer am 23.10.2026)
Sieben Tests schrieben „ATtiny85 planned bzw. ohne Grafik“ fest:
tests/shared/boards.test.ts(3): Statusliste, Standard-Boards, Boards mit Browser-Backend.tests/server/config.test.ts:/api/configlistet den ATtiny85 mit.tests/server/routes/compiler-board.routes.test.ts(2): „nicht angebotenes Board“ ist weiter der ATtiny85, jetzt in einer Bereitstellung ohne Browser-Backend. Die Ablehnung bleibt geprüft.tests/client/components/arduino-board-views.test.tsx: eigene Grafik statt der des Uno.🤖 Generated with Claude Code