-
Notifications
You must be signed in to change notification settings - Fork 178
Pull requests: NVlabs/cuda-oxide
Author
Label
Projects
Milestones
Reviews
Assignee
Sort
Pull requests list
feat: Add cbrt intrinsic support for f32 and f64
codegen
Device code-generation pipeline (Rust MIR to IR to PTX)
enhancement
New feature or request
intrinsics
Device intrinsics and libdevice math mappings
#148
opened Jun 9, 2026 by
goog00
Contributor
Loading…
2 tasks
fix(mir-lower): declare direct __nv_* libdevice externs at the call site
bug
Something isn't working
intrinsics
Device intrinsics and libdevice math mappings
IR-lowering
Lowering between dialects (dialect-mir to LLVM dialect)
#144
opened Jun 8, 2026 by
haixuanTao
Loading…
fix(mir-importer): preserve op location/span in lowering error messages
codegen
Device code-generation pipeline (Rust MIR to IR to PTX)
QoL-improvement
Quality-of-life improvement; not a correctness fix
#143
opened Jun 8, 2026 by
haixuanTao
Loading…
fix(mir-importer): lower libm float ops to libdevice intrinsics
bug
Something isn't working
codegen
Device code-generation pipeline (Rust MIR to IR to PTX)
intrinsics
Device intrinsics and libdevice math mappings
#142
opened Jun 8, 2026 by
haixuanTao
Loading…
fix(mir-lower): fall back to live operand type in arithmetic signedness check
bug
Something isn't working
codegen
Device code-generation pipeline (Rust MIR to IR to PTX)
IR-lowering
Lowering between dialects (dialect-mir to LLVM dialect)
#141
opened Jun 8, 2026 by
haixuanTao
Loading…
fix(mir-importer): translate Something isn't working
codegen
Device code-generation pipeline (Rust MIR to IR to PTX)
str, fn-pointer and fn-item types
bug
#140
opened Jun 8, 2026 by
haixuanTao
Loading…
Add scalar f16 atomic support
cuda-feature
A CUDA hardware/toolkit feature (TMA, tcgen05, WGMMA)
enhancement
New feature or request
intrinsics
Device intrinsics and libdevice math mappings
#134
opened Jun 7, 2026 by
advpropsys
Contributor
Loading…
feat(codegen): fma contraction and an opt -O3 pass to match nvcc defaults
codegen
Device code-generation pipeline (Rust MIR to IR to PTX)
enhancement
New feature or request
perf
Performance of generated code or of the compiler itself
#117
opened Jun 6, 2026 by
alejandro-soto-franco
Contributor
Loading…
Add debug information to the generated PTX code
debug info
Debug information in generated PTX/IR (line/source maps)
enhancement
New feature or request
Add support for cargo oxide debug and pipeline commands in non-example projects
cargo-oxide
The `cargo oxide` subcommand and build automation
enhancement
New feature or request
#103
opened Jun 2, 2026 by
Barrow099
Contributor
Loading…
Support typed NVVM IR for pre-Blackwell libNVVM targets
Depends
Blocked on another PR/issue or an upstream dependency
enhancement
New feature or request
llvm-export
Textual LLVM/NVVM IR exporter (llvm-export crate)
#101
opened May 30, 2026 by
mohamedsamirx
Contributor
Loading…
Keep in-flight async future results alive on drop
bug
Something isn't working
host-apis
Host-side runtime APIs (cuda-host, cuda-core, cuda-async)
#100
opened May 29, 2026 by
fallintoplace
Loading…
sys: honor CUDA_TOOLKIT_PATH in runtime discovery
bug
Something isn't working
build-related
Build scripts, toolchain discovery, or compilation setup
#95
opened May 27, 2026 by
yagna-1
Loading…
Fix/GPU memory leak on DeviceBuffer allocation failure
bug
Something isn't working
host-apis
Host-side runtime APIs (cuda-host, cuda-core, cuda-async)
#92
opened May 26, 2026 by
winshaurya
Contributor
Loading…
cuda-bindings: handle CUDA header discovery errors
bug
Something isn't working
build-related
Build scripts, toolchain discovery, or compilation setup
cuda-bindings
Raw FFI bindings to the CUDA driver/runtime
#88
opened May 26, 2026 by
yagna-1
Loading…
Add cvt_f16x2_f32 intrinsic for f32-to-f16x2 packing
enhancement
New feature or request
intrinsics
Device intrinsics and libdevice math mappings
#66
opened May 16, 2026 by
honeyspoon
Loading…
ProTip!
Add no:assignee to see everything that’s not assigned.