mfd: intel-m10-bmc: Synchronize timestamp with BMC

The PMCI MAX10 BMC contains high and low timestamp registers that are
to be periodically written by the host driver to facilitate BMC error
logs. Add a kernel worker thread at BMC initialization time to update
the BMC timestamp registers at a frequency of once per minute.

Signed-off-by: Russ Weight <russell.h.weight@intel.com>

Author: Russ Weight

drivers/mfd/Kconfig

@@ -2174,5 +2174,14 @@ config MFD_INTEL_M10_BMC_PMCI
 	  additional drivers must be enabled in order to use the functionality
 	  of the device.
 
+config MFD_INTEL_M10_BMC_LOG
+	tristate "Intel MAX 10 Board Management Controller Log Driver"
+	depends on MFD_INTEL_M10_BMC
+	help
+	  Support for the Intel MAX 10 board management controller log
+
+	  This driver provides timestamp synchronization with the MAX10
+	  BMC log.
+
 endmenu
 endif

drivers/mfd/Makefile

@@ -273,3 +273,4 @@ intel-m10-bmc-objs             := intel-m10-bmc-core.o
 obj-$(CONFIG_MFD_INTEL_M10_BMC_CORE)   += intel-m10-bmc.o
 obj-$(CONFIG_MFD_INTEL_M10_BMC_SPI)   += intel-m10-bmc-spi.o
 obj-$(CONFIG_MFD_INTEL_M10_BMC_PMCI)  += intel-m10-bmc-pmci.o
+obj-$(CONFIG_MFD_INTEL_M10_BMC_LOG)  += intel-m10-bmc-log.o

drivers/mfd/intel-m10-bmc-core.c

@@ -13,7 +13,8 @@
 
 static struct mfd_cell pmci_bmc_subdevs[] = {
 	{ .name = "intel-pmci-hwmon" },
-	{ .name = "intel-pmci-secure" }
+	{ .name = "intel-pmci-secure" },
+	{ .name = "intel-pmci-log" }
 };
 
 static const struct regmap_range pmci_fw_handshake_regs[] = {

drivers/mfd/intel-m10-bmc-log.c

@@ -0,0 +1,86 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Intel Max10 Board Management Controller Secure Update Driver
+ *
+ * Copyright (C) 2021 Intel Corporation. All rights reserved.
+ *
+ */
+
+#include <linux/bitfield.h>
+#include <linux/mfd/intel-m10-bmc.h>
+#include <linux/module.h>
+
+struct m10bmc_log {
+	struct device *dev;
+	struct intel_m10bmc *m10bmc;
+	unsigned int freq_s;		/* update frequency in seconds */
+	struct delayed_work dwork;
+};
+
+#define M10BMC_TIMESTAMP_FREQ   60	/* 60 seconds between updates */
+#define TIME_LOW	GENMASK(31, 0)
+#define TIME_HIGH	GENMASK(63, 32)
+static void m10bmc_log_time_sync(struct work_struct *work)
+{
+	struct delayed_work *dwork;
+	u32 time_high, time_low;
+	struct m10bmc_log *log;
+	s64 time_ns;
+	int ret;
+
+	dwork = to_delayed_work(work);
+	log = container_of(dwork, struct m10bmc_log, dwork);
+
+	time_ns = ktime_to_ns(ktime_get_real());
+	time_low = (u32)FIELD_GET(TIME_LOW, time_ns);
+	time_high = (u32)FIELD_GET(TIME_LOW, time_ns);
+	ret = regmap_write(log->m10bmc->regmap, m10bmc_base(log->m10bmc) +
+			   PMCI_M10BMC_TIME_HIGH, time_high);
+	if (!ret)
+		ret = regmap_write(log->m10bmc->regmap,
+				   m10bmc_base(log->m10bmc) +
+				   PMCI_M10BMC_TIME_LOW, time_low);
+	if (ret)
+		dev_err_once(log->dev,
+			     "Failed to update BMC timestamp: %d\n", ret);
+
+	schedule_delayed_work(&log->dwork, log->freq_s * HZ);
+}
+
+static int m10bmc_log_probe(struct platform_device *pdev)
+{
+	struct m10bmc_log *ddata;
+
+	ddata = devm_kzalloc(&pdev->dev, sizeof(*ddata), GFP_KERNEL);
+	if (!ddata)
+		return -ENOMEM;
+
+	ddata->dev = &pdev->dev;
+	ddata->m10bmc = dev_get_drvdata(pdev->dev.parent);
+	ddata->freq_s = M10BMC_TIMESTAMP_FREQ;
+	INIT_DELAYED_WORK(&ddata->dwork, m10bmc_log_time_sync);
+	dev_set_drvdata(&pdev->dev, ddata);
+
+	m10bmc_log_time_sync(&ddata->dwork.work);
+
+	return 0;
+}
+
+int m10bmc_log_remove(struct platform_device *pdev)
+{
+	struct m10bmc_log *ddata = dev_get_drvdata(&pdev->dev);
+
+	cancel_delayed_work_sync(&ddata->dwork);
+	return 0;
+}
+
+static struct platform_driver intel_m10bmc_log_driver = {
+	.probe = m10bmc_log_probe,
+	.remove = m10bmc_log_remove,
+};
+module_platform_driver(intel_m10bmc_log_driver);
+
+MODULE_AUTHOR("Intel Corporation");
+MODULE_DESCRIPTION("Intel MAX10 BMC Log");
+MODULE_LICENSE("GPL v2");
+MODULE_ALIAS("platform:intel-m10bmc-log");

include/linux/mfd/intel-m10-bmc.h

@@ -178,6 +178,9 @@ enum m10bmc_type {
 #define PMCI_M10BMC_MAC_LOW    0x20
 #define PMCI_M10BMC_MAC_HIGH    0x24
 
+#define PMCI_M10BMC_TIME_LOW	0x60
+#define PMCI_M10BMC_TIME_HIGH	0x60
+
 #define PMCI_M10BMC_FLASH_CTRL 0x1d0
 #define FLASH_MUX_SELECTION GENMASK(2, 0)
 #define FLASH_MUX_IDLE 0