UofT Course: ECE295 Team F1
Warning: Do not plagiarise. Specific numbers, labels and part numbers have been hidden for this purpose.
We acknowledged that there are much more complicated circuits for power amplifications. For example, the Class D transformer based designs (which we did design and simulate in LTSpice). However the room for error was greatly increased with these designs while the performance was lacking. We opted for a single FET design and focused on perfecting the resonant/tank circuit to reduce power losses.
Input > Comparator -> MOSFET driver -> MOSFET -> Tank circuit -> LPF -> Antenna
Did seperate power and GND pours (+12V on the top, and GND on the bottom layer). Used vias to connect the layers together. Trace widths were adjusted for the current flow through the trace (to avoid any power losses or overheating issues).
Used hand held soldering iron and soldering paste + sencils + reflow oven to assemble the final PCB.
After testing the PCB we realized the comparator we had selected wasn't functioning as intended. After researching on the root cause, we noticed that the limits for the comparator varies with the power supply and input signal.
Input limitation: -0.1V – 3.8V
Our input: -0.5V – 0.5V (since it is a 1 Vpp sine wave input), violating the allowable range.
We resolved this by a clever bypass on the comparator since order a new comparator was not possible at the time. We also tried a shift circuit to move our wave in the allowable range before reaching the comparator but this was not possible with the test board feeding the signal.
Although our tank circuit was tuned for functionality at 14MHz, and the test equipment limited us at 10MHz we still get results that meet the design requirements -- they also match with our simulation results at 10MHz. We would expect around 7W of power at 14MHz. THD would definitely stay <10% given the 7 stage filter.
