SJTU-YONGFU-RESEARCH-GRP
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Repositories
- SPRSound Public
This repository contains the released respiratory sound database for IEEE BioCAS Respiratory Sound Track Challenges.
SJTU-YONGFU-RESEARCH-GRP/SPRSound’s past year of commit activity - spi-customizer Public
A GitHub-based system for automatic generation of custom SPI (Serial Peripheral Interface) cores with RTL simulation and testing.
SJTU-YONGFU-RESEARCH-GRP/spi-customizer’s past year of commit activity - llm-LDO-divide Public Forked from leslie-lw/llm-PMIC
Use LLM-based mehtod to solve PMIC parameter division and behavioral modeling problems
SJTU-YONGFU-RESEARCH-GRP/llm-LDO-divide’s past year of commit activity - llm_gmid_sizing Public Forked from leslie-lw/llm_gmid_sizing
Use gmid method to optimize opamp, and use LLM to optimize full LDO
SJTU-YONGFU-RESEARCH-GRP/llm_gmid_sizing’s past year of commit activity - score Public
SCORE is an open-source dataset containing consistently generated Verilog RTL code from various state-of-the-art SoC generators and hardware construction languages. The primary motivation for this project is to address the reproducibility and consistency challenges in EDA research benchmarking.
SJTU-YONGFU-RESEARCH-GRP/score’s past year of commit activity - spice_netlist_parser Public
A robust, AST-based parser for SPICE netlist files with comprehensive analysis and validation capabilities.
SJTU-YONGFU-RESEARCH-GRP/spice_netlist_parser’s past year of commit activity - spice_netlist_generator Public
A Python CLI tool for generating random SPICE (Simulation Program with Integrated Circuits Emphasis) netlists with configurable device types, connectivity guarantees, and ngspice simulation integration.
SJTU-YONGFU-RESEARCH-GRP/spice_netlist_generator’s past year of commit activity - website-trial-v1 Public
SJTU-YONGFU-RESEARCH-GRP/website-trial-v1’s past year of commit activity - standard-cells-netlist Public
This repository exists to standardize how we define and reference standard cells across formats and toolchains. a) cell names and variants (logic families and aliases) b) drive strengths (X1, X2, ...) c) format emitters (Verilog, VHDL, SPICE, Spectre, CDL) d) topology and metadata used for consistent generation/verification.
SJTU-YONGFU-RESEARCH-GRP/standard-cells-netlist’s past year of commit activity - ESDED-Emerging-Semiconductor-Device-Electrical-Dataset Public
This repository contains the Emerging Semiconductor Device Electrical Dataset (ESDED), a comprehensive collection of electrical characteristics data for various emerging semiconductor devices. The dataset includes detailed I-V characteristics and device parameters for Gate-All-Around (GAA) FETs, Nanosheet FETs, and Complementary FETs (CFETs)
SJTU-YONGFU-RESEARCH-GRP/ESDED-Emerging-Semiconductor-Device-Electrical-Dataset’s past year of commit activity
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