Add native and RISC-V unit test coverage

[carlosqwqqwq]

Why

concurrentqueue is already designed as a portable C++11 implementation and does not rely on architecture-specific assembly or SIMD backends in its core queue logic.

For this project, the missing part is not a new RISC-V code path in the library itself, but official verification coverage:

• the main implementation is intended to be portable, but that portability was not exercised by upstream CI;
• the repository already has a practical native unit test build flow, and it can also be cross-compiled for riscv64 Linux and executed under QEMU without changing the queue algorithm;
• documenting riscv64 support in the README is much more credible if the repository actually runs that verification automatically.

This patch keeps the lock-free implementation unchanged and turns the existing portability claim into a reproducible CI-backed test path.

What changed

• Added .github/workflows/ci.yml:
  • build and run the unit tests on native ubuntu-latest;
  • cross-compile the same unit tests with g++-riscv64-linux-gnu;
  • run the resulting riscv64 test binary under qemu-riscv64-static.
• Updated README.md:
  • replace the old “only on x86 processors so far” wording;
  • document that GitHub Actions now also cross-compiles and runs the unit tests for riscv64 Linux under QEMU.

Verification

• Verified native Windows rebuild and execution:
  • rebuilt build/bin/unittests.exe with the repository's existing command-line flow;
  • ran .\build\bin\unittests.exe --disable-prompt --iterations 1;
  • all tests passed.
• Verified workflow-equivalent Linux execution in Docker (ubuntu:24.04):
  • installed g++, g++-riscv64-linux-gnu, and qemu-user-static;
  • rebuilt and ran native Linux unit tests;
  • all tests passed.
• Verified real riscv64 Linux cross-compilation and QEMU execution in Docker:
  • built build/bin-riscv/unittests-riscv64 with riscv64-linux-gnu-g++;
  • ran it with qemu-riscv64-static -L /usr/riscv64-linux-gnu;
  • all tests passed.

Notes

• This patch does not change the queue algorithm, memory ordering logic, or lock-free behavior.
• The goal is to upstream reproducible riscv64 verification coverage for an already portable implementation, not to introduce a new RISC-V-specific optimization backend.