qspi: phytium: update phytium qspi controller driver support to 6.6.0.4

[xiaqian1486]

This patches updates the support for phytium qspi controller driver.

1. Use the corresponding configurations for each chip
2. Strict QSPI compile dependency

Summary by Sourcery

Update the Phytium QSPI controller driver to track per-chip configuration and correctly program controller registers for dirmap transfers.

Bug Fixes:

• Store read and write configuration registers per chip select instead of globally to avoid conflicts when multiple flashes are attached.
• Reprogram the read configuration register before each dirmap read to ensure correct controller state after other operations or power transitions.

Enhancements:

• Simplify resume handling by only restoring the flash capacity register when dirmap is enabled, relying on per-chip configuration to be set during access.

[sourcery-ai]

Reviewer's guide (collapsed on small PRs)

Reviewer's Guide

Updates the Phytium QSPI controller driver to maintain per-chip read/write configuration registers and ensure the correct configuration is applied per chip-select during dirmap operations, while also tightening Kconfig dependencies for QSPI build integration.

Sequence diagram for per-chip dirmap read/write configuration

sequenceDiagram
    participant Caller
    participant phytium_qspi_dirmap_create
    participant phytium_qspi_dirmap_read
    participant phytium_qspi_dirmap_write
    participant QSPI_HW

    Caller->>phytium_qspi_dirmap_create: phytium_qspi_dirmap_create(desc)
    activate phytium_qspi_dirmap_create
    phytium_qspi_dirmap_create->>QSPI_HW: writel_relaxed(cmd, QSPI_RD_CFG_REG)
    phytium_qspi_dirmap_create-->>Caller: rd_cfg_reg[spi->chip_select] = cmd
    deactivate phytium_qspi_dirmap_create

    Caller->>phytium_qspi_dirmap_read: phytium_qspi_dirmap_read(desc, offs, len, buf)
    activate phytium_qspi_dirmap_read
    phytium_qspi_dirmap_read->>QSPI_HW: writel_relaxed(rd_cfg_reg[spi->chip_select], QSPI_RD_CFG_REG)
    phytium_qspi_dirmap_read->>QSPI_HW: memcpy_fromio(buf_rx, src, len)
    phytium_qspi_dirmap_read-->>Caller: return len
    deactivate phytium_qspi_dirmap_read

    Caller->>phytium_qspi_dirmap_write: phytium_qspi_dirmap_write(desc, offs, len, buf)
    activate phytium_qspi_dirmap_write
    phytium_qspi_dirmap_write->>QSPI_HW: writel_relaxed(wr_cfg_reg[spi->chip_select], QSPI_WR_CFG_REG)
    phytium_qspi_dirmap_write-->>Caller: return len
    deactivate phytium_qspi_dirmap_write

Loading

File-Level Changes

Change	Details	Files
Track and apply separate read/write configuration registers per NOR flash chip-select in the Phytium QSPI driver.	Change single wr_cfg_reg and rd_cfg_reg fields in the driver state to per-chip arrays indexed by PHYTIUM_QSPI_MAX_NORCHIP. On dirmap creation, store the computed RD_CFG and WR_CFG register values into the per-chip arrays using spi->chip_select as the index. Before each dirmap read, reload the RD_CFG hardware register from the stored per-chip configuration for the corresponding chip-select. Before each dirmap write, reload the WR_CFG hardware register from the stored per-chip configuration for the corresponding chip-select. Remove the resume-time restoration of the single RD_CFG register value, relying instead on other mechanisms or per-chip reprogramming.	drivers/spi/spi-phytium-qspi.c
Tighten SPI Phytium QSPI driver Kconfig dependency on QSPI to ensure correct compilation configuration.	Adjust the Phytium QSPI driver Kconfig entry to express a strict dependency on QSPI support. Aligns driver build configuration with kernel 6.6.0.4 expectations.	drivers/spi/Kconfig

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[deepin-ci-robot]

[APPROVALNOTIFIER] This PR is NOT APPROVED

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[deepin-ci-robot]

Hi @xiaqian1486. Thanks for your PR.

I'm waiting for a deepin-community member to verify that this patch is reasonable to test. If it is, they should reply with /ok-to-test on its own line. Until that is done, I will not automatically test new commits in this PR, but the usual testing commands by org members will still work. Regular contributors should join the org to skip this step.

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[Avenger-285714]

/ok-to-test

[sourcery-ai]

Hey - I've left some high level feedback:

• When indexing wr_cfg_reg[] and rd_cfg_reg[] by spi->chip_select, consider adding a sanity check or at least a clear comment that chip_select < PHYTIUM_QSPI_MAX_NORCHIP is guaranteed by the core, to make the per-CS storage assumption explicit and guard against future changes.
• Now that rd_cfg_reg is per-chip and only programmed in phytium_qspi_dirmap_create(), it may be worth clarifying (via a comment near phytium_qspi_dirmap_read()/write()) that these paths are only reachable after a successful dirmap setup, so using the stored per-CS config cannot hit an uninitialized slot.

Prompt for AI Agents

Please address the comments from this code review:

## Overall Comments
- When indexing `wr_cfg_reg[]` and `rd_cfg_reg[]` by `spi->chip_select`, consider adding a sanity check or at least a clear comment that `chip_select < PHYTIUM_QSPI_MAX_NORCHIP` is guaranteed by the core, to make the per-CS storage assumption explicit and guard against future changes.
- Now that `rd_cfg_reg` is per-chip and only programmed in `phytium_qspi_dirmap_create()`, it may be worth clarifying (via a comment near `phytium_qspi_dirmap_read()`/`write()`) that these paths are only reachable after a successful dirmap setup, so using the stored per-CS config cannot hit an uninitialized slot.

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[Copilot]

Pull request overview

Updates the Phytium QSPI controller driver to keep per-chip-select read/write configuration and to reprogram the controller’s read configuration before each direct-mapped read, improving correctness when multiple flashes share the controller and across state transitions.

Changes:

• Store RD_CFG / WR_CFG programming values per chip select instead of globally.
• Reprogram RD_CFG_REG on each dirmap read and simplify resume handling by no longer restoring RD_CFG_REG there.
• Tighten Kconfig dependencies for SPI_PHYTIUM_QSPI.

Reviewed changes

Copilot reviewed 2 out of 2 changed files in this pull request and generated 1 comment.

File	Description
drivers/spi/spi-phytium-qspi.c	Track RD/WR config per chip select and reapply RD config before each dirmap read; adjust resume behavior accordingly.
drivers/spi/Kconfig	Update build dependencies for the Phytium QSPI driver.

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