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1 | | -;; RUN: llc --mtriple=hexagon -mattr=+hvxv79,+hvx-length128b %s -o - | FileCheck %s |
| 1 | +;; RUN: llc --mtriple=hexagon -mattr=+hvxv79,+hvx-length128b %s -o - | FileCheck --enable-var-scope %s |
2 | 2 |
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3 | 3 | define dso_local void @store_isnan_f32(ptr %a, ptr %b, ptr %isnan_cmp) local_unnamed_addr { |
4 | 4 | entry: |
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13 | 13 | ret void |
14 | 14 | } |
15 | 15 |
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16 | | -; CHECK: store_isnan_f32 |
| 16 | +; CHECK-LABEL:store_isnan_f32 |
17 | 17 | ; CHECK: [[RONE32:r[0-9]+]] = #1 |
18 | 18 | ; CHECK: [[VOP2_F32:v[0-9]+]] = vxor([[VOP2_F32]],[[VOP2_F32]]) |
19 | 19 | ; CHECK: [[VOP1_F32:v[0-9]+]] = vmemu(r0+#0) |
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45 | 45 | ; CHECK: [[VOP3_F16:v[0-9]+]] = vmemu(r1+#0) |
46 | 46 | ; CHECK: [[Q1_F16]] &= vcmp.eq([[VOP3_F16]].h,[[VOP3_F16]].h) |
47 | 47 | ; CHECK: [[VOUT_F16:v[0-9]+]] = vmux([[Q1_F16]],[[VOP2_F16]],[[VONES16]]) |
48 | | -; CHECK: vmemu(r2+#0) = [[VOUT_F32]] |
| 48 | +; CHECK: vmemu(r2+#0) = [[VOUT_F16]] |
49 | 49 |
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50 | 50 | define dso_local void @store_isordered_f32(ptr %a, ptr %b, ptr %isordered_cmp) local_unnamed_addr { |
51 | 51 | entry: |
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60 | 60 | ret void |
61 | 61 | } |
62 | 62 | ; CHECK-LABEL: store_isordered_f32 |
| 63 | +; CHECK: [[RONE32:r[0-9]+]] = #1 |
63 | 64 | ; CHECK: [[VOP2_ORD_F32:v[0-9]+]] = vxor([[VOP2_ORD_F32]],[[VOP2_ORD_F32]]) |
64 | 65 | ; CHECK: [[VOP1_ORD_F32:v[0-9]+]] = vmemu(r0+#0) |
65 | 66 | ; CHECK: [[VONES_ORD_F32:v[0-9]+]] = vsplat([[RONE32]]) |
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83 | 84 | ret void |
84 | 85 | } |
85 | 86 | ; CHECK-LABEL: store_isordered_f16 |
| 87 | +; CHECK: [[RONE16:r[0-9]+]] = #1 |
86 | 88 | ; CHECK: [[VOP2_ORD_F16:v[0-9]+]] = vxor([[VOP2_ORD_F16]],[[VOP2_ORD_F16]]) |
87 | 89 | ; CHECK: [[VOP1_ORD_F16:v[0-9]+]] = vmemu(r0+#0) |
88 | 90 | ; CHECK: [[VONES_ORD_F16:v[0-9]+]].h = vsplat([[RONE16]]) |
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