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[Hexagon] Fix a bug in setcc isnan lit test for f16 (llvm#179338)
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Lines changed: 5 additions & 3 deletions

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llvm/test/CodeGen/Hexagon/inst_setcc_uno_uo.ll

Lines changed: 5 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -1,4 +1,4 @@
1-
;; RUN: llc --mtriple=hexagon -mattr=+hvxv79,+hvx-length128b %s -o - | FileCheck %s
1+
;; RUN: llc --mtriple=hexagon -mattr=+hvxv79,+hvx-length128b %s -o - | FileCheck --enable-var-scope %s
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define dso_local void @store_isnan_f32(ptr %a, ptr %b, ptr %isnan_cmp) local_unnamed_addr {
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entry:
@@ -13,7 +13,7 @@ entry:
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ret void
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}
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; CHECK: store_isnan_f32
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; CHECK-LABEL:store_isnan_f32
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; CHECK: [[RONE32:r[0-9]+]] = #1
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; CHECK: [[VOP2_F32:v[0-9]+]] = vxor([[VOP2_F32]],[[VOP2_F32]])
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; CHECK: [[VOP1_F32:v[0-9]+]] = vmemu(r0+#0)
@@ -45,7 +45,7 @@ entry:
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; CHECK: [[VOP3_F16:v[0-9]+]] = vmemu(r1+#0)
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; CHECK: [[Q1_F16]] &= vcmp.eq([[VOP3_F16]].h,[[VOP3_F16]].h)
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; CHECK: [[VOUT_F16:v[0-9]+]] = vmux([[Q1_F16]],[[VOP2_F16]],[[VONES16]])
48-
; CHECK: vmemu(r2+#0) = [[VOUT_F32]]
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; CHECK: vmemu(r2+#0) = [[VOUT_F16]]
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define dso_local void @store_isordered_f32(ptr %a, ptr %b, ptr %isordered_cmp) local_unnamed_addr {
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entry:
@@ -60,6 +60,7 @@ entry:
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ret void
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}
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; CHECK-LABEL: store_isordered_f32
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; CHECK: [[RONE32:r[0-9]+]] = #1
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; CHECK: [[VOP2_ORD_F32:v[0-9]+]] = vxor([[VOP2_ORD_F32]],[[VOP2_ORD_F32]])
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; CHECK: [[VOP1_ORD_F32:v[0-9]+]] = vmemu(r0+#0)
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; CHECK: [[VONES_ORD_F32:v[0-9]+]] = vsplat([[RONE32]])
@@ -83,6 +84,7 @@ entry:
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ret void
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}
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; CHECK-LABEL: store_isordered_f16
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; CHECK: [[RONE16:r[0-9]+]] = #1
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; CHECK: [[VOP2_ORD_F16:v[0-9]+]] = vxor([[VOP2_ORD_F16]],[[VOP2_ORD_F16]])
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; CHECK: [[VOP1_ORD_F16:v[0-9]+]] = vmemu(r0+#0)
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; CHECK: [[VONES_ORD_F16:v[0-9]+]].h = vsplat([[RONE16]])

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