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Update the JIT to share the xplat vector tables across platforms #130049

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Update the JIT to share the xplat vector tables across platforms #130049

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444176b
Update the JIT to share the xplat vector tables across platforms
tannergooding Jun 30, 2026
3f84a72
Prepatory work for some of the xplat SIMD support for WASM
tannergooding Jun 30, 2026
65a0edb
Apply formatting patch
tannergooding Jun 30, 2026
8ed5bf5
Merge remote-tracking branch 'dotnet/main' into wasm-simd
tannergooding Jun 30, 2026
cace755
Resolve merge conflicts and don't bump JIT/EE version for a non repor…
tannergooding Jun 30, 2026
8b2b938
Fix EMSB to use the right intrinsic
tannergooding Jun 30, 2026
e840822
Fix a case that was falling through incorrectly
tannergooding Jun 30, 2026
fa9aca2
Fix NarrowWithSaturation on Arm64
tannergooding Jul 1, 2026
0a63d85
Don't handle V128 Get/With Lower/Upper on xarch
tannergooding Jul 1, 2026
1963f49
Fix an assert on xarch and ConvertToDouble on Arm64
tannergooding Jul 1, 2026
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1 change: 1 addition & 0 deletions src/coreclr/inc/corinfoinstructionset.h
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Expand Up @@ -14,6 +14,7 @@
enum CORINFO_InstructionSet
{
InstructionSet_ILLEGAL = 0,
InstructionSet_Vector = 126,
InstructionSet_NONE = 127,
#ifdef TARGET_ARM64
InstructionSet_ArmBase=1,
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1 change: 1 addition & 0 deletions src/coreclr/jit/CMakeLists.txt
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Expand Up @@ -368,6 +368,7 @@ set( JIT_HEADERS
host.h
hostallocator.h
hwintrinsic.h
hwintrinsiclist.h
ICorJitInfo_names_generated.h
ICorJitInfo_wrapper_generated.hpp
inline.h
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25 changes: 4 additions & 21 deletions src/coreclr/jit/assertionprop.cpp
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Expand Up @@ -340,16 +340,12 @@ static Range GetRange(Compiler* comp, GenTree* tree, BasicBlock* block, ASSERT_V
switch (id)
{
#if defined(TARGET_XARCH)
case NI_Vector256_ExtractMostSignificantBits:
case NI_Vector512_ExtractMostSignificantBits:
case NI_X86Base_MoveMask:
case NI_AVX_MoveMask:
case NI_AVX2_MoveMask:
case NI_AVX512_MoveMask:
#elif defined(TARGET_ARM64)
case NI_Vector64_ExtractMostSignificantBits:
#endif
case NI_Vector128_ExtractMostSignificantBits:
case NI_Vector_ExtractMostSignificantBits:
{
// We have 1 bit per element, remaining upper bits are 0

Expand Down Expand Up @@ -1948,23 +1944,10 @@ AssertionInfo Compiler::optAssertionGenJtrue(GenTree* tree)
GenTreeHWIntrinsic* hwi = op1->AsHWIntrinsic();
switch (hwi->GetHWIntrinsicId())
{
#if defined(TARGET_XARCH)
case NI_Vector128_op_Equality:
case NI_Vector256_op_Equality:
case NI_Vector512_op_Equality:
#elif defined(TARGET_ARM64)
case NI_Vector64_op_Equality:
case NI_Vector128_op_Equality:
#endif
case NI_Vector_op_Equality:
break;
#if defined(TARGET_XARCH)
case NI_Vector128_op_Inequality:
case NI_Vector256_op_Inequality:
case NI_Vector512_op_Inequality:
#elif defined(TARGET_ARM64)
case NI_Vector64_op_Inequality:
case NI_Vector128_op_Inequality:
#endif

case NI_Vector_op_Inequality:
equals = !equals;
break;

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8 changes: 4 additions & 4 deletions src/coreclr/jit/codegenxarch.cpp
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Expand Up @@ -5431,12 +5431,11 @@ void CodeGen::genCodeForStoreInd(GenTreeStoreInd* tree)
GenTreeHWIntrinsic* hwintrinsic = data->AsHWIntrinsic();
NamedIntrinsic intrinsicId = hwintrinsic->GetHWIntrinsicId();
var_types baseType = hwintrinsic->GetSimdBaseType();
unsigned simdSize = hwintrinsic->GetSimdSize();

switch (intrinsicId)
{
case NI_Vector128_ToScalar:
case NI_Vector256_ToScalar:
case NI_Vector512_ToScalar:
case NI_Vector_ToScalar:
case NI_X86Base_ConvertToInt32:
case NI_X86Base_ConvertToUInt32:
case NI_X86Base_X64_ConvertToInt64:
Expand All @@ -5457,9 +5456,10 @@ void CodeGen::genCodeForStoreInd(GenTreeStoreInd* tree)
break;
}

case NI_Vector128_GetElement:
case NI_Vector_GetElement:
{
assert(baseType == TYP_FLOAT);
assert(simdSize == 16);
FALLTHROUGH;
}

Expand Down
14 changes: 14 additions & 0 deletions src/coreclr/jit/compiler.h
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Expand Up @@ -3524,6 +3524,7 @@ class Compiler

GenTree* gtNewSimdGetIndicesNode(var_types type, var_types simdBaseType, unsigned simdSize);

#if defined(TARGET_XARCH) || defined(TARGET_ARM64)
GenTree* gtNewSimdGetLowerNode(var_types type,
GenTree* op1,
var_types simdBaseType,
Expand All @@ -3533,6 +3534,7 @@ class Compiler
GenTree* op1,
var_types simdBaseType,
unsigned simdSize);
#endif // !TARGET_XARCH && !TARGET_ARM64

GenTree* gtNewSimdIsEvenIntegerNode(var_types type,
GenTree* op1,
Expand Down Expand Up @@ -3724,6 +3726,7 @@ class Compiler
var_types simdBaseType,
unsigned simdSize);

#if defined(TARGET_XARCH) || defined(TARGET_ARM64)
GenTree* gtNewSimdWithLowerNode(var_types type,
GenTree* op1,
GenTree* op2,
Expand All @@ -3735,6 +3738,7 @@ class Compiler
GenTree* op2,
var_types simdBaseType,
unsigned simdSize);
#endif // !TARGET_XARCH && !TARGET_ARM64

GenTreeHWIntrinsic* gtNewScalarHWIntrinsicNode(var_types type, NamedIntrinsic hwIntrinsicID);
GenTreeHWIntrinsic* gtNewScalarHWIntrinsicNode(var_types type, GenTree* op1, NamedIntrinsic hwIntrinsicID);
Expand Down Expand Up @@ -5358,6 +5362,16 @@ class Compiler
unsigned simdSize,
bool mustExpand);

GenTree* impXplatIntrinsic(NamedIntrinsic intrinsic,
CORINFO_CLASS_HANDLE clsHnd,
CORINFO_METHOD_HANDLE method,
CORINFO_SIG_INFO* sig
R2RARG(CORINFO_CONST_LOOKUP* entryPoint),
var_types simdBaseType,
var_types retType,
unsigned simdSize,
bool mustExpand);

GenTree* getArgForHWIntrinsic(var_types argType, CORINFO_CLASS_HANDLE argClass);
GenTree* impNonConstFallback(NamedIntrinsic intrinsic, var_types simdType, var_types simdBaseType);
GenTree* addRangeCheckIfNeeded(
Expand Down
14 changes: 5 additions & 9 deletions src/coreclr/jit/decomposelongs.cpp
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Expand Up @@ -1909,16 +1909,12 @@ GenTree* DecomposeLongs::DecomposeHWIntrinsic(LIR::Use& use)

switch (hwintrinsicTree->GetHWIntrinsicId())
{
case NI_Vector128_GetElement:
case NI_Vector256_GetElement:
case NI_Vector512_GetElement:
case NI_Vector_GetElement:
{
return DecomposeHWIntrinsicGetElement(use, hwintrinsicTree);
}

case NI_Vector128_ToScalar:
case NI_Vector256_ToScalar:
case NI_Vector512_ToScalar:
case NI_Vector_ToScalar:
{
return DecomposeHWIntrinsicToScalar(use, hwintrinsicTree);
}
Expand All @@ -1939,7 +1935,7 @@ GenTree* DecomposeLongs::DecomposeHWIntrinsic(LIR::Use& use)
}

//------------------------------------------------------------------------
// DecomposeHWIntrinsicGetElement: Decompose GT_HWINTRINSIC -- NI_Vector*_GetElement.
// DecomposeHWIntrinsicGetElement: Decompose GT_HWINTRINSIC -- NI_Vector_GetElement.
//
// Decompose a get[i] node on Vector*<long>. For:
//
Expand All @@ -1953,7 +1949,7 @@ GenTree* DecomposeLongs::DecomposeHWIntrinsic(LIR::Use& use)
// hi_result = GT_HWINTRINSIC{GetElement}[int](tmp_simd_var, tmp_index_times_two + 1)
// return: GT_LONG(lo_result, hi_result)
//
// This isn't optimal codegen, since NI_Vector*_GetElement sometimes requires
// This isn't optimal codegen, since NI_Vector_GetElement sometimes requires
// temps that could be shared, for example.
//
// Arguments:
Expand Down Expand Up @@ -2048,7 +2044,7 @@ GenTree* DecomposeLongs::DecomposeHWIntrinsicGetElement(LIR::Use& use, GenTreeHW
}

//------------------------------------------------------------------------
// DecomposeHWIntrinsicToScalar: Decompose GT_HWINTRINSIC -- NI_Vector*_ToScalar.
// DecomposeHWIntrinsicToScalar: Decompose GT_HWINTRINSIC -- NI_Vector_ToScalar.
//
// create:
//
Expand Down
155 changes: 30 additions & 125 deletions src/coreclr/jit/fgbasic.cpp
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Expand Up @@ -1191,26 +1191,17 @@ void Compiler::fgFindJumpTargets(const BYTE* codeAddr, IL_OFFSET codeSize, Fixed
case NI_ArmBase_Arm64_ReverseElementBits:
case NI_ArmBase_LeadingZeroCount:
case NI_ArmBase_ReverseElementBits:
case NI_Vector64_Create:
case NI_Vector64_CreateScalar:
case NI_Vector64_CreateScalarUnsafe:
#endif // TARGET_ARM64
case NI_Vector128_Create:
case NI_Vector128_CreateScalar:
case NI_Vector128_CreateScalarUnsafe:
case NI_Vector_Create:
case NI_Vector_CreateScalar:
case NI_Vector_CreateScalarUnsafe:
#if defined(TARGET_XARCH)
case NI_AVX2_LeadingZeroCount:
case NI_AVX2_TrailingZeroCount:
case NI_AVX2_X64_LeadingZeroCount:
case NI_AVX2_X64_TrailingZeroCount:
case NI_X86Base_PopCount:
case NI_X86Base_X64_PopCount:
case NI_Vector256_Create:
case NI_Vector512_Create:
case NI_Vector256_CreateScalar:
case NI_Vector512_CreateScalar:
case NI_Vector256_CreateScalarUnsafe:
case NI_Vector512_CreateScalarUnsafe:
case NI_X86Base_BitScanForward:
case NI_X86Base_X64_BitScanForward:
case NI_X86Base_BitScanReverse:
Expand Down Expand Up @@ -1425,67 +1416,21 @@ void Compiler::fgFindJumpTargets(const BYTE* codeAddr, IL_OFFSET codeSize, Fixed
}

#if defined(FEATURE_HW_INTRINSICS)
#if defined(TARGET_ARM64)
case NI_Vector64_As:
case NI_Vector64_AsByte:
case NI_Vector64_AsDouble:
case NI_Vector64_AsInt16:
case NI_Vector64_AsInt32:
case NI_Vector64_AsInt64:
case NI_Vector64_AsNInt:
case NI_Vector64_AsNUInt:
case NI_Vector64_AsSByte:
case NI_Vector64_AsSingle:
case NI_Vector64_AsUInt16:
case NI_Vector64_AsUInt32:
case NI_Vector64_AsUInt64:
case NI_Vector64_op_UnaryPlus:
#endif // TARGET_ARM64
case NI_Vector128_As:
case NI_Vector128_AsByte:
case NI_Vector128_AsDouble:
case NI_Vector128_AsInt16:
case NI_Vector128_AsInt32:
case NI_Vector128_AsInt64:
case NI_Vector128_AsNInt:
case NI_Vector128_AsNUInt:
case NI_Vector128_AsSByte:
case NI_Vector128_AsSingle:
case NI_Vector128_AsUInt16:
case NI_Vector128_AsUInt32:
case NI_Vector128_AsUInt64:
case NI_Vector128_AsVector4:
case NI_Vector128_op_UnaryPlus:
#if defined(TARGET_XARCH)
case NI_Vector256_As:
case NI_Vector256_AsByte:
case NI_Vector256_AsDouble:
case NI_Vector256_AsInt16:
case NI_Vector256_AsInt32:
case NI_Vector256_AsInt64:
case NI_Vector256_AsNInt:
case NI_Vector256_AsNUInt:
case NI_Vector256_AsSByte:
case NI_Vector256_AsSingle:
case NI_Vector256_AsUInt16:
case NI_Vector256_AsUInt32:
case NI_Vector256_AsUInt64:
case NI_Vector256_op_UnaryPlus:
case NI_Vector512_As:
case NI_Vector512_AsByte:
case NI_Vector512_AsDouble:
case NI_Vector512_AsInt16:
case NI_Vector512_AsInt32:
case NI_Vector512_AsInt64:
case NI_Vector512_AsNInt:
case NI_Vector512_AsNUInt:
case NI_Vector512_AsSByte:
case NI_Vector512_AsSingle:
case NI_Vector512_AsUInt16:
case NI_Vector512_AsUInt32:
case NI_Vector512_AsUInt64:
case NI_Vector512_op_UnaryPlus:
#endif // TARGET_XARCH
case NI_Vector_As:
case NI_Vector_AsByte:
case NI_Vector_AsDouble:
case NI_Vector_AsInt16:
case NI_Vector_AsInt32:
case NI_Vector_AsInt64:
case NI_Vector_AsNInt:
case NI_Vector_AsNUInt:
case NI_Vector_AsSByte:
case NI_Vector_AsSingle:
case NI_Vector_AsUInt16:
case NI_Vector_AsUInt32:
case NI_Vector_AsUInt64:
case NI_Vector_AsVector4:
case NI_Vector_op_UnaryPlus:
#endif // FEATURE_HW_INTRINSICS
case NI_SRCS_UNSAFE_As:
case NI_SRCS_UNSAFE_AsRef:
Expand All @@ -1502,58 +1447,18 @@ void Compiler::fgFindJumpTargets(const BYTE* codeAddr, IL_OFFSET codeSize, Fixed
}

#if defined(FEATURE_HW_INTRINSICS)
#if defined(TARGET_ARM64)
case NI_Vector64_get_AllBitsSet:
case NI_Vector64_get_E:
case NI_Vector64_get_Epsilon:
case NI_Vector64_get_NaN:
case NI_Vector64_get_NegativeInfinity:
case NI_Vector64_get_NegativeOne:
case NI_Vector64_get_NegativeZero:
case NI_Vector64_get_One:
case NI_Vector64_get_Pi:
case NI_Vector64_get_PositiveInfinity:
case NI_Vector64_get_Tau:
case NI_Vector64_get_Zero:
#endif // TARGET_ARM64
case NI_Vector128_get_AllBitsSet:
case NI_Vector128_get_E:
case NI_Vector128_get_Epsilon:
case NI_Vector128_get_NaN:
case NI_Vector128_get_NegativeInfinity:
case NI_Vector128_get_NegativeOne:
case NI_Vector128_get_NegativeZero:
case NI_Vector128_get_One:
case NI_Vector128_get_Pi:
case NI_Vector128_get_PositiveInfinity:
case NI_Vector128_get_Tau:
case NI_Vector128_get_Zero:
#if defined(TARGET_XARCH)
case NI_Vector256_get_AllBitsSet:
case NI_Vector256_get_E:
case NI_Vector256_get_Epsilon:
case NI_Vector256_get_NaN:
case NI_Vector256_get_NegativeInfinity:
case NI_Vector256_get_NegativeOne:
case NI_Vector256_get_NegativeZero:
case NI_Vector256_get_One:
case NI_Vector256_get_Pi:
case NI_Vector256_get_PositiveInfinity:
case NI_Vector256_get_Tau:
case NI_Vector256_get_Zero:
case NI_Vector512_get_AllBitsSet:
case NI_Vector512_get_E:
case NI_Vector512_get_Epsilon:
case NI_Vector512_get_NaN:
case NI_Vector512_get_NegativeInfinity:
case NI_Vector512_get_NegativeOne:
case NI_Vector512_get_NegativeZero:
case NI_Vector512_get_One:
case NI_Vector512_get_Pi:
case NI_Vector512_get_PositiveInfinity:
case NI_Vector512_get_Tau:
case NI_Vector512_get_Zero:
#endif // TARGET_XARCH
case NI_Vector_get_AllBitsSet:
case NI_Vector_get_E:
case NI_Vector_get_Epsilon:
case NI_Vector_get_NaN:
case NI_Vector_get_NegativeInfinity:
case NI_Vector_get_NegativeOne:
case NI_Vector_get_NegativeZero:
case NI_Vector_get_One:
case NI_Vector_get_Pi:
case NI_Vector_get_PositiveInfinity:
case NI_Vector_get_Tau:
case NI_Vector_get_Zero:
#endif // FEATURE_HW_INTRINSICS
{
// These always produce a vector constant
Expand Down
5 changes: 3 additions & 2 deletions src/coreclr/jit/fgdiagnostic.cpp
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Expand Up @@ -3478,6 +3478,7 @@ void Compiler::fgDebugCheckFlags(GenTree* tree, BasicBlock* block)
{
GenTreeHWIntrinsic* hwintrinsic = tree->AsHWIntrinsic();
NamedIntrinsic intrinsicId = hwintrinsic->GetHWIntrinsicId();
unsigned simdSize = hwintrinsic->GetSimdSize();

if (hwintrinsic->OperIsMemoryLoad())
{
Expand Down Expand Up @@ -3516,9 +3517,9 @@ void Compiler::fgDebugCheckFlags(GenTree* tree, BasicBlock* block)
break;
}

case NI_Vector128_op_Division:
case NI_Vector256_op_Division:
case NI_Vector_op_Division:
{
assert((simdSize == 16) || (simdSize == 32));
break;
}
#endif // TARGET_XARCH
Expand Down
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