Skip to content
View lalit-quicklogic's full-sized avatar

Block or report lalit-quicklogic

Block user

Prevent this user from interacting with your repositories and sending you notifications. Learn more about blocking users.

You must be logged in to block users.

Maximum 250 characters. Please don’t include any personal information such as legal names or email addresses. Markdown is supported. This note will only be visible to you.
Report abuse

Contact GitHub support about this user’s behavior. Learn more about reporting abuse.

Report abuse

Popular repositories Loading

  1. vtr-verilog-to-routing vtr-verilog-to-routing Public

    Forked from verilog-to-routing/vtr-verilog-to-routing

    Verilog to Routing -- Open Source CAD Flow for FPGA Research

    C++

  2. OpenFPGA OpenFPGA Public

    Forked from lnis-uofu/OpenFPGA

    An Open-source FPGA IP Generator

    Verilog