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[ROM] Increase ROM size to 128 KiB#29654

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rroth-lowrisc:increased_rom
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[ROM] Increase ROM size to 128 KiB#29654
rroth-lowrisc wants to merge 5 commits intolowRISC:masterfrom
rroth-lowrisc:increased_rom

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@rroth-lowrisc rroth-lowrisc commented Apr 1, 2026

This PR aims to increase the ROM size for Earl Grey from 32 kB to 64 kB 128 KiB. Moves the ROM base address from 0x8000 to 0x20000for power-of-two alignment to avoid TL-UL translation errors. As consequence the rv_dm base address moves from 0x10000 to 0x40000 to avoid memory conflicts.

Most of the changes are autogenerated from top_earlgrey.hjson however the default values in ibex_pmp_reset_pkg.sv and the size in rom_e2e_self_hash_test.c needs to be updated manually. In order to run the rom_e2e_self_hash test, the relevant line in the BUILD file needs to be uncommented.

@rroth-lowrisc rroth-lowrisc requested review from a team as code owners April 1, 2026 14:18
@rroth-lowrisc rroth-lowrisc requested review from hcallahan-lowrisc, jwnrt, pamaury and vogelpi and removed request for a team April 1, 2026 14:18
@rroth-lowrisc rroth-lowrisc added SW:ROM ROM related issues TOP:earlgrey labels Apr 2, 2026
rroth-lowrisc added a commit to rroth-lowrisc/qemu_bk that referenced this pull request Apr 2, 2026
[This PR](lowRISC/opentitan#29654) increases the size of the boot ROM from 32 kB to 64 kB. This commit changes all values in the qemu configuration to match the values in the PR.
@etterli etterli added the CI:Rerun Rerun failed CI jobs label Apr 2, 2026
@github-actions github-actions bot removed the CI:Rerun Rerun failed CI jobs label Apr 2, 2026
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Thanks @rroth-lowrisc for your PR, this looks mostly good to me!

I have some questions:

  • @pamaury , @luismarques This PR just touches Earlgrey which is intended. But AFAIK, we build the same or a very similar ROM also for Darjeeling, so might run into similar issues there soon. Should we also extend the first ROM of Darjeeling?
  • @pamaury , @luismarques It looks like we also need to extend QEMU accordingly to get CI to pass. Could someone please guide Raphael to get this done?
  • @rroth-lowrisc There are quite some FPGA CI failures. It's probably more efficient to debug these locally using an FPGA board. People in the office can help you getting started with that.

status_t hash_rom(void) {
hmac_digest_t rom_hash;
hmac_sha256((void *)TOP_EARLGREY_ROM_BASE_ADDR, kGoldenRomSizeBytes,
hmac_sha256((void *)TOP_EARLGREY_ROM_CTRL_ROM_BASE_ADDR, kGoldenRomSizeBytes,
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Are you sure using this different constant here is correct?

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This commit changed the define-name from TOP_EARLGREY_ROM_BASE_ADDR to TOP_EARLGREY_ROM_CTRL_ROM_BASE_ADDR (‎hw/top_earlgrey/sw/autogen/top_earlgrey.h). Because the rom_e2e_self_hash_test is commented out I suspect nobody changed this define. However, to be fair, @jwnrt provided me with this fix.

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Thanks for explaining, this is reasonable :-)

@nasahlpa nasahlpa requested a review from meisnere April 7, 2026 07:48
@rroth-lowrisc rroth-lowrisc added the CI:Rerun Rerun failed CI jobs label Apr 14, 2026
@github-actions github-actions bot removed the CI:Rerun Rerun failed CI jobs label Apr 14, 2026
rroth-lowrisc added a commit to rroth-lowrisc/qemu that referenced this pull request Apr 14, 2026
[This PR](lowRISC/opentitan#29654) increases the size of the boot ROM from 32 kB to 128 kB.
This commit changes all values in the qemu configuration to match
the values in the PR.

Signed-off-by: Raphael Roth <rroth@lowrisc.org>
@rroth-lowrisc rroth-lowrisc changed the title [ROM] Increase ROM size to 64kB [ROM] Increase ROM size to 128kB Apr 14, 2026
@rroth-lowrisc rroth-lowrisc added the CI:Rerun Rerun failed CI jobs label Apr 14, 2026
@github-actions github-actions bot removed the CI:Rerun Rerun failed CI jobs label Apr 14, 2026
@rroth-lowrisc rroth-lowrisc requested a review from a team as a code owner April 17, 2026 15:38
@andreaskurth andreaskurth changed the title [ROM] Increase ROM size to 128kB [ROM] Increase ROM size to 128 KiB Apr 20, 2026
Increases the size of the boot rom from 32kB to 128kB to allow further code
integration in the rom section. Moves the rom base address from 0x8000 to
0x20000 for power-of-two alignment to avoid TL-UL translation errors.
To avoid conflict with the boot rom memory region the rv_dm base address
moves to 0x40000 . Modify the physical-memory-protection (PMP) reset values
to incorporate the new base addresses.

Signed-off-by: Raphael Roth <rroth@lowrisc.org>
Signed-off-by: Raphael Roth <rroth@lowrisc.org>
When building the FPGA image vivado utilizes
BLOCKRAM as boot rom replacement. The name
of these cells needs to be updated as otherwise this
hook fails.

Signed-off-by: Raphael Roth <rroth@lowrisc.org>
Increasing the ROM to 128kB breaks the current version of qemu.
For the record: the QEMU fork is set up to emulate earlgrey 1.0.0 as
it was taped out and therefore any major change in the architecture
will break it. I temporarily disable the qemu related tests in
the ci until the SW team has time to update the lowRISC qemu fork
(as agreed with the SW team).

Signed-off-by: Raphael Roth <rroth@lowrisc.org>
This commit introduces a manual fix, as the Vivado tool
`updatemem` does not work otherwise. When the ROM is increased
to 128kB, Vivado maps the ROM to the BRAM cells differently to how
it does with 32kB / 64kB. The problem is that the address range
defined in the header of the generated `memory.mmi` file no longer
matches the file size of the ROM memory content file, which causes
the updatemem tool to crash. Therefore, this commit artificially
matches the size in the header with the known size of the memory
content file.

Signed-off-by: Raphael Roth <rroth@lowrisc.org>
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