Simplified bytecode op list

[mkeeter]

Remove dedicated immediate ops in favor of a reserved register. This experimentally improves GPU interpreter performance (not yet published).

[Copilot]

Pull request overview

This PR simplifies the bytecode opcode space by eliminating dedicated immediate op variants and instead encoding immediates via a reserved register (u8::MAX / 0xFF), and removes the now-unneeded RegOpDiscriminants from fidget-core.

Changes:

• Remove RegOpDiscriminants generation/export from fidget-core.
• Revamp fidget-bytecode opcode representation to a smaller BytecodeOp set and update bytecode emission to use register 0xFF as the “inline immediate” marker.
• Update bytecode builder API to error if the reserved register is used, and add new dependencies (serde, thiserror).

Reviewed changes

Copilot reviewed 5 out of 7 changed files in this pull request and generated 5 comments.

Show a summary per file

File	Description
fidget-core/src/compiler/op.rs	Drops discriminant-deriving machinery from RegOp now that bytecode no longer relies on it.
fidget-core/src/compiler/mod.rs	Stops re-exporting RegOpDiscriminants.
fidget-bytecode/src/lib.rs	Introduces a simplified opcode enum and updates bytecode encoding to use reserved-register immediates; Bytecode::new now returns a Result.
fidget-bytecode/Cargo.toml	Adds serde + thiserror dependencies needed by the revised bytecode layer.
CHANGELOG.md	Documents the reserved-register bytecode revamp and removal of RegOpDiscriminants.
Cargo.lock	Locks newly introduced dependencies.

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