Skip to content
View nwad123's full-sized avatar
  • Utah

Block or report nwad123

Block user

Prevent this user from interacting with your repositories and sending you notifications. Learn more about blocking users.

You must be logged in to block users.

Maximum 250 characters. Please don’t include any personal information such as legal names or email addresses. Markdown is supported. This note will only be visible to you.
Report abuse

Contact GitHub support about this user’s behavior. Learn more about reporting abuse.

Report abuse
nwad123/README.md

Hello there! πŸ‘‹

I'm Nick, a computer engineer interested in digital design and formal verification.

Work πŸ’» and School πŸ“š

I currently working as a chip design verification engineer and I studied computer engineering πŸ–₯️ at Utah State University.

Coding Experience πŸ§‘β€πŸ’»

I am comfortable with several programming languages, but C++ is closest to my heart. It's very quirky and full of pitfalls, but also has some neat features and a great community.

Website

I have a website where I put blog posts. Currently it doesn't look very pretty as my design skills are "developing" πŸ™ƒ, but it does have some content on it.

Dream Project πŸš€

I dream of writing an open source, fully standards compliant System Verilog simulator that could be used in schools and on personal projects.

Pinned Loading

  1. resume resume Public

    My resume template in LaTeX.

    TeX

  2. narrows narrows Public

    A header-only generic library with simple cross threaded channels for C++20.

    C++

  3. A-star_Global_Router A-star_Global_Router Public

    My A* global routing solution for ECE 5460 - VLSI Design Automation

    C++

  4. nvim_config nvim_config Public

    My neovim configuration

    Lua

  5. histogram_cs6300 histogram_cs6300 Public

    My parallel histogram generator for USU CS6300

    C++