dlyerr_2_errpat - from 3GPP S4-121077#180
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Reads a delay/error profile (one entry per packet, giving network delay in ms and a loss flag) and emits an error pattern suitable for use with the STL `eid-xor` tool. Supports both fixed-delay and bounded-loss-rate jitter buffer management emulation modes. Provided by Fraunhofer IIS via 3GPP Tdoc S4-121077 in support of the EVS processing plan.
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Thank you very much for the contribution. Could you provide test vectors to ensure the compiled software works as intended? |
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@sdoehla-iis, does the tool actually produce a g192 compatible bitstream as in src/eid/gen-patt.c for example? |
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Delay-and-error profile to frame-erasure pattern conversion tool. Reads a
delay/error profile (one entry per packet, giving network delay in ms and a
loss flag) and emits an error pattern suitable for use with the STL
eid-xortool. Supports both fixed-delay and bounded-loss-rate jitterbuffer management emulation modes.
Provided by Fraunhofer IIS via 3GPP Tdoc S4-121077, in support of the EVS
codec processing plan.