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    157 repositories

    • opentitan

      Public
      OpenTitan: Open source silicon root of trust
      SystemVerilog
      •
      Apache License 2.0
      •990•3.3k•1.5k•349•Updated Apr 22, 2026Apr 22, 2026

    • mocha

      Public
      CHERI-enabled secure enclave that can be integrated as a subsytem on a system on chip.
      SystemVerilog
      •13•28•130•15•Updated Apr 22, 2026Apr 22, 2026

    • style-guides

      Public
      lowRISC Style Guides
      Creative Commons Attribution 4.0 International
      •129•497•19•1•Updated Apr 21, 2026Apr 21, 2026

    • binutils

      Public
      (Unsupported) lowRISC fork of Binutils
      C
      •
      GNU General Public License v2.0
      •2•0•0•1•Updated Apr 20, 2026Apr 20, 2026

    • lowrisc-nix

      Public
      lowRISC Nix Packages and Environments
      Nix
      •
      MIT License
      •11•8•1•2•Updated Apr 19, 2026Apr 19, 2026

    • dvsim

      Public
      DVSim is a build and run system written in Python that runs a variety of EDA tool flows
      Python
      •
      Apache License 2.0
      •12•7•26•3•Updated Apr 17, 2026Apr 17, 2026

    • cva6-cheri

      Public
      Assembly
      •
      Other
      •9•0•0•0•Updated Apr 17, 2026Apr 17, 2026

    • ftditool

      Public
      A C++ implementation for SPI Flash and GPIO leveraging FTDI MPSSE-enabled chips.
      C++
      •
      Other
      •0•1•0•0•Updated Apr 15, 2026Apr 15, 2026

    • sonata-software

      Public
      Software, build flows and examples for the Sonata System
      C++
      •
      Apache License 2.0
      •16•13•4•1•Updated Apr 15, 2026Apr 15, 2026

    • opentitan-provisioning

      Public
      Reference OpenTitan Provisioning Infrastructure
      Go
      •
      Apache License 2.0
      •10•14•16•1•Updated Apr 14, 2026Apr 14, 2026

    • sonata-system

      Public
      A full micro-controller system utilizing the CHERIoT Ibex core, part of the Sunburst project funded by UKRI
      C++
      •
      Apache License 2.0
      •33•52•11•9•Updated Apr 14, 2026Apr 14, 2026

    • ibex

      Public
      Ibex is a small 32 bit RISC-V CPU core, previously known as zero-riscy.
      hardwarerisc-vrv32
      hardwarerisc-vrv32cpucore
      SystemVerilog
      •
      Apache License 2.0
      •720•1.9k•211•39•Updated Apr 14, 2026Apr 14, 2026

    • ci-actions

      Public
      Reuseable Github Actions for CI workflows in lowRISC projects.
      MIT License
      •0•0•0•0•Updated Apr 14, 2026Apr 14, 2026

    • opensbi

      Public
      OpenSBI with CHERI-RISC-V support
      6•0•0•0•Updated Apr 9, 2026Apr 9, 2026

    • riscv-isa-sim

      Public
      RISC-V Functional ISA Simulator
      C
      •
      Other
      •1.1k•20•0•2•Updated Mar 16, 2026Mar 16, 2026

    • sail-cheri-riscv

      Public
      CHERI-RISC-V model written in Sail
      Isabelle
      •
      Other
      •25•0•0•0•Updated Feb 27, 2026Feb 27, 2026

    • sail-riscv

      Public
      Sail RISC-V model
      Coq
      •
      Other
      •258•0•0•0•Updated Feb 27, 2026Feb 27, 2026

    • sail

      Public
      Sail architecture definition language
      Isabelle
      •
      Other
      •154•0•0•0•Updated Feb 27, 2026Feb 27, 2026

    • lowrisc-toolchains

      Public
      UNSUPPORTED INTERNAL toolchain builds
      Shell
      •21•48•3•0•Updated Feb 24, 2026Feb 24, 2026

    • qemu

      Public
      Fork of QEMU for development of lowRISC platforms (including OpenTitan)
      C
      •
      Other
      •6.7k•9•11•5•Updated Feb 19, 2026Feb 19, 2026

    • verilator

      Public
      Verilator open-source SystemVerilog simulator and lint system
      SystemVerilog
      •
      Other
      •796•1•0•0•Updated Feb 6, 2026Feb 6, 2026

    • ibex-demo-system

      Public
      A demo system for Ibex including debug support and some peripherals
      C
      •
      Apache License 2.0
      •74•94•13•7•Updated Jan 21, 2026Jan 21, 2026

    • benevisrdl

      Public
      This repository houses PeakRDL plugins, named after Ben Nevis, the UK's tallest peak.
      SystemVerilog
      •
      Apache License 2.0
      •1•0•0•0•Updated Jan 7, 2026Jan 7, 2026

    • llvm-project

      Public
      The LLVM Project is a collection of modular and reusable compiler and toolchain technologies. Note: the repository does not accept github pull requests at this …
      C++
      •17k•2•0•0•Updated Jan 6, 2026Jan 6, 2026

    • container-hotplug

      Public
      Hot-plug devices into a Docker container as they are plugged.
      Rust
      •5•16•2•0•Updated Nov 18, 2025Nov 18, 2025

    • ot-sca

      Public
      Side-channel analysis setup for OpenTitan
      Jupyter Notebook
      •
      Apache License 2.0
      •34•38•27•5•Updated Nov 3, 2025Nov 3, 2025

    • serde-annotate

      Public
      Serde Serializer with formatting controls
      Rust
      •
      Apache License 2.0
      •5•1•0•0•Updated Oct 16, 2025Oct 16, 2025

    • QuickCheckVEngine

      Public
      A RISC-V TestRIG Verification Engine based on QuickCheck
      Haskell
      •
      BSD 2-Clause "Simplified" License
      •11•0•0•0•Updated Sep 4, 2025Sep 4, 2025

    • cheriot-ibex

      Public
      cheriot-ibex is a RTL implementation of CHERIoT ISA based on LowRISC's Ibex core.
      SystemVerilog
      •
      Apache License 2.0
      •24•1•0•0•Updated Aug 21, 2025Aug 21, 2025

    • TestRIG

      Public
      Testing processors with Random Instruction Generation
      Python
      •
      Other
      •18•1•0•0•Updated Aug 13, 2025Aug 13, 2025
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