FROMLIST: Bluetooth: qca: enable QCC2072 on RB3 Gen 2 Industrial - #843
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Merge Check Failed: CR Not Eligible for Merge CR 4615698 is not eligible for merge. The parent software image for kernel.qli.2.0 is not development complete. Entity: Please ensure the CR passes both CCT (ComponentChangeTasks) and ICT (Integration Change Tasks) validations. |
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PR #843 — validate-patchPR: #843
Final Summary
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PR #843 — checker-log-analyzerPR: #843
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PR #843 — validate-patchPR: #843
Final Summary
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PR #843 — checker-log-analyzerPR: #843
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Rahul Samana (rahul-samana)
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PR #843 — validate-patchPR: #843
Final Summary
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PR #843 — checker-log-analyzerPR: #843
Detailed report: Full report
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QCC2072 uses the ORN firmware and NVM naming scheme. The RB3 Gen 2 Industrial BT-over-UART setup also needs the BCS calibration TLV to be combined with the selected NVM before download. Keep the BCS/NVM combination in a helper so missing calibration data or allocation failures can fall back to downloading the NVM alone without a local skip label. Select the NVM file and BCS calibration file using the controller board ID when available, with fallback to the default files. Initialize the BCS calibration filename independently of the NVM filename source so custom NVM firmware-name paths do not leave it unset. [qcom-6.18.y: hci_qca QCC2072 registration from the upstream patch is already present, so keep only the btqca NVM and calibration update.] Signed-off-by: Vivek Sahu <vivek.sahu@oss.qualcomm.com> Co-developed-by: Yepuri Siddu <yepuri.siddu@oss.qualcomm.com> Signed-off-by: Yepuri Siddu <yepuri.siddu@oss.qualcomm.com> Signed-off-by: Rahul Samana <rahul.samana@oss.qualcomm.com> Link: https://lore.kernel.org/r/20260727-rb3-industrial-bt-uart-v2-2-2d100f30e202@oss.qualcomm.com
… node The reworked RB3 Gen 2 Industrial BT UART overlay needs to disable the on-board WCN6750 PMU and add a graph endpoint to the M.2 PCI node. Label the exact WCN6750 PMU node and PCI child node connected to the M.2 E-key slot so the overlay can patch them directly instead of using a full path or reconstructing the nested PCI hierarchy. Signed-off-by: Rahul Samana <rahul.samana@oss.qualcomm.com> Link: https://lore.kernel.org/r/20260727-rb3-industrial-bt-uart-v2-4-2d100f30e202@oss.qualcomm.com
The PCI core needs to associate the DT node below the QCS6490 PCIe host bridge with the enumerated PCI-to-PCI bridge device before child nodes can be matched against the PCI topology. Add compatible = "pciclass,0604" to pcie0_port so child nodes below the bridge can be matched by the PCI device class. [qcom-6.18.y: upstream applies this change to kodiak.dtsi, while this branch still carries the PCIe root port node in sc7280.dtsi.] Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Signed-off-by: Rahul Samana <rahul.samana@oss.qualcomm.com> Link: https://lore.kernel.org/r/20260727-rb3-industrial-bt-uart-v2-5-2d100f30e202@oss.qualcomm.com
The reworked RB3 Gen 2 Industrial mezzanine keeps the common Industrial mezzanine hardware description but routes QCC2072 Bluetooth over UART4 instead of the default Bluetooth-over-USB path. Build this variant by applying the common Industrial mezzanine overlay first, followed by the BT UART overlay. The overlay models the M.2 E-key connector graph endpoints for PCIe and UART, and disables the on-board WCN6750 PMU and UART7 path so the M.2 QCC2072 Bluetooth controller can be used instead. [qcom-6.18.y: replace the old downstream m2-cologne overlay target and file with the generic BT UART overlay name used by the upstream-posted series.] Signed-off-by: Rahul Samana <rahul.samana@oss.qualcomm.com> Link: https://lore.kernel.org/r/20260727-rb3-industrial-bt-uart-v2-6-2d100f30e202@oss.qualcomm.com
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PR #843 — validate-patchPR: #843
Final Summary
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PR #843 — checker-log-analyzerPR: #843
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Shiraz Hashim (shashim-quic)
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Shiraz Hashim (shashim-quic)
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CRs-Fixed: 4615698
remove this line from all commit log, and confine it to only PR description. That will be sufficient.
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PR #843 — validate-patchPR: #843
Final Summary
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PR #843 — checker-log-analyzerPR: #843
Detailed report: Full report
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4 participants
Bring in the upstream-posted QCC2072 Bluetooth enablement for the RB3 Gen 2
Industrial BT-over-UART variant on qcom-6.18.y.
This replaces the older downstream m2-cologne overlay with the M.2 power
sequencing model and keeps the qcom-6.18.y kernel DTBO naming aligned with
the BT UART variant.
The required pwrseq QCC2072 PCI ID is already present in qcom-6.18.y
This PR carries the remaining pieces from the v2 upstream series that are
needed on qcom-6.18.y:
Upstream series:
https://lore.kernel.org/all/20260727-rb3-industrial-bt-uart-v2-0-2d100f30e202@oss.qualcomm.com/
CRs-Fixed: 4615698