ast2600: Add FTGMAC100 Ethernet MAC and Aspeed MDIO controller#192
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garybeihl wants to merge 1 commit intorenode:masterfrom
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ast2600: Add FTGMAC100 Ethernet MAC and Aspeed MDIO controller#192garybeihl wants to merge 1 commit intorenode:masterfrom
garybeihl wants to merge 1 commit intorenode:masterfrom
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Full FTGMAC100 Ethernet MAC implementation with DMA descriptor ring TX/RX, inheriting from NetworkWithPHY and implementing IMACInterface for integration with Renode's network switch infrastructure. TX path: walks descriptor ring, reads buffer data via sysbus, fires FrameReady on last segment. RX path: MAC filtering (broadcast, multicast, unicast, RX_ALL), writes frame data to RX descriptors with FRS/LRS/VDBC flags, queues frames when no descriptors available. Aspeed MDIO controller for external PHY register access, matching the AST2600 hardware which uses a separate MDIO bus at 0x1E650000 rather than the FTGMAC100's built-in PHYCR registers. Embeds RTL8211E PHY register defaults with link-up status. Together these eliminate the 90-second eth0 systemd timeout during OpenBMC boot by allowing the Linux ftgmac100 driver to successfully probe all four MACs and attach to their PHYs. Signed-off-by: Gary Beihl <garybeihl@microsoft.com>
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Summary
NetworkWithPHYand implementingIMACInterfaceFTGMAC100 features
FrameReadyon last segment (LTS)Aspeed MDIO
Impact
Eliminates the 90-second eth0 systemd timeout during OpenBMC boot. All four AST2600 MACs probe successfully with RTL8211F PHY driver attached.
Test plan
ftgmac100 1e660000.ethernet eth0: Link is up