99#ifndef __CS35L56_H
1010#define __CS35L56_H
1111
12+ #include <linux/bits.h>
1213#include <linux/debugfs.h>
1314#include <linux/firmware/cirrus/cs_dsp.h>
1415#include <linux/regulator/consumer.h>
@@ -26,6 +27,9 @@ struct snd_ctl_elem_value;
2627#define CS35L56_GLOBAL_ENABLES 0x0002014
2728#define CS35L56_BLOCK_ENABLES 0x0002018
2829#define CS35L56_BLOCK_ENABLES2 0x000201C
30+ #define CS35L56_SYNC_GPIO1_CFG 0x0002410
31+ #define CS35L56_ASP2_DIO_GPIO13_CFG 0x0002440
32+ #define CS35L56_UPDATE_REGS 0x0002A0C
2933#define CS35L56_REFCLK_INPUT 0x0002C04
3034#define CS35L56_GLOBAL_SAMPLE_RATE 0x0002C0C
3135#define CS35L56_OTP_MEM_53 0x00300D4
@@ -65,6 +69,9 @@ struct snd_ctl_elem_value;
6569#define CS35L56_IRQ1_MASK_8 0x000E0AC
6670#define CS35L56_IRQ1_MASK_18 0x000E0D4
6771#define CS35L56_IRQ1_MASK_20 0x000E0DC
72+ #define CS35L56_GPIO_STATUS1 0x000F000
73+ #define CS35L56_GPIO1_CTRL1 0x000F008
74+ #define CS35L56_GPIO13_CTRL1 0x000F038
6875#define CS35L56_MIXER_NGATE_CH1_CFG 0x0010004
6976#define CS35L56_MIXER_NGATE_CH2_CFG 0x0010008
7077#define CS35L56_DSP_MBOX_1_RAW 0x0011000
@@ -130,6 +137,17 @@ struct snd_ctl_elem_value;
130137#define CS35L56_MTLREVID_MASK 0x0000000F
131138#define CS35L56_REVID_B0 0x000000B0
132139
140+ /* PAD_INTF */
141+ #define CS35L56_PAD_GPIO_PULL_MASK GENMASK(3, 2)
142+ #define CS35L56_PAD_GPIO_IE BIT(0)
143+
144+ #define CS35L56_PAD_PULL_NONE 0
145+ #define CS35L56_PAD_PULL_UP 1
146+ #define CS35L56_PAD_PULL_DOWN 2
147+
148+ /* UPDATE_REGS */
149+ #define CS35L56_UPDT_GPIO_PRES BIT(6)
150+
133151/* ASP_ENABLES1 */
134152#define CS35L56_ASP_RX2_EN_SHIFT 17
135153#define CS35L56_ASP_RX1_EN_SHIFT 16
@@ -185,6 +203,12 @@ struct snd_ctl_elem_value;
185203/* MIXER_NGATE_CHn_CFG */
186204#define CS35L56_AUX_NGATE_CHn_EN 0x00000001
187205
206+ /* GPIOn_CTRL1 */
207+ #define CS35L56_GPIO_DIR_MASK BIT(31)
208+ #define CS35L56_GPIO_FN_MASK GENMASK(2, 0)
209+
210+ #define CS35L56_GPIO_FN_GPIO 0x00000001
211+
188212/* Mixer input sources */
189213#define CS35L56_INPUT_SRC_NONE 0x00
190214#define CS35L56_INPUT_SRC_ASP1RX1 0x08
@@ -279,6 +303,7 @@ struct snd_ctl_elem_value;
279303#define CS35L56_HALO_STATE_TIMEOUT_US 250000
280304#define CS35L56_RESET_PULSE_MIN_US 1100
281305#define CS35L56_WAKE_HOLD_TIME_US 1000
306+ #define CS35L56_PAD_PULL_SETTLE_US 10
282307
283308#define CS35L56_CALIBRATION_POLL_US (100 * USEC_PER_MSEC)
284309#define CS35L56_CALIBRATION_TIMEOUT_US (5 * USEC_PER_SEC)
@@ -289,6 +314,9 @@ struct snd_ctl_elem_value;
289314#define CS35L56_NUM_BULK_SUPPLIES 3
290315#define CS35L56_NUM_DSP_REGIONS 5
291316
317+ #define CS35L56_MAX_GPIO 13
318+ #define CS35L63_MAX_GPIO 9
319+
292320/* Additional margin for SYSTEM_RESET to control port ready on SPI */
293321#define CS35L56_SPI_RESET_TO_PORT_READY_US (CS35L56_CONTROL_PORT_READY_US + 2500)
294322
@@ -338,6 +366,10 @@ struct cs35l56_base {
338366 const struct cirrus_amp_cal_controls * calibration_controls ;
339367 struct dentry * debugfs ;
340368 u64 silicon_uid ;
369+ u8 onchip_spkid_gpios [5 ];
370+ u8 num_onchip_spkid_gpios ;
371+ u8 onchip_spkid_pulls [5 ];
372+ u8 num_onchip_spkid_pulls ;
341373};
342374
343375static inline bool cs35l56_is_otp_register (unsigned int reg )
@@ -413,6 +445,11 @@ void cs35l56_warn_if_firmware_missing(struct cs35l56_base *cs35l56_base);
413445void cs35l56_log_tuning (struct cs35l56_base * cs35l56_base , struct cs_dsp * cs_dsp );
414446int cs35l56_hw_init (struct cs35l56_base * cs35l56_base );
415447int cs35l56_get_speaker_id (struct cs35l56_base * cs35l56_base );
448+ int cs35l56_check_and_save_onchip_spkid_gpios (struct cs35l56_base * cs35l56_base ,
449+ const u32 * gpios , int num_gpios ,
450+ const u32 * pulls , int num_pulls );
451+ int cs35l56_configure_onchip_spkid_pads (struct cs35l56_base * cs35l56_base );
452+ int cs35l56_read_onchip_spkid (struct cs35l56_base * cs35l56_base );
416453int cs35l56_get_bclk_freq_id (unsigned int freq );
417454void cs35l56_fill_supply_names (struct regulator_bulk_data * data );
418455
0 commit comments