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Merge pull request #160 from bkokoszx/ssp_master_slave_hwd
apl-ssp: setting additional bits in ssp registers
2 parents a2cfd8c + c6f9868 commit f7d1c68

3 files changed

Lines changed: 48 additions & 1 deletion

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src/drivers/apl-ssp.c

Lines changed: 34 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -252,6 +252,40 @@ static inline int ssp_set_config(struct dai *dai,
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253253
sscr0 |= SSCR0_MOD | SSCR0_ACS;
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255+
/* Additional hardware settings */
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257+
/* Receiver Time-out Interrupt Disabled/Enabled */
258+
sscr1 |= (ssp->params.quirks & SOF_DAI_INTEL_SSP_QUIRK_TINTE) ?
259+
SSCR1_TINTE : 0;
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/* Peripheral Trailing Byte Interrupts Disable/Enable */
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sscr1 |= (ssp->params.quirks & SOF_DAI_INTEL_SSP_QUIRK_PINTE) ?
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SSCR1_PINTE : 0;
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/* Transmit data are driven at the same/opposite clock edge specified
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* in SSPSP.SCMODE[1:0]
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*/
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sscr2 |= (ssp->params.quirks & SOF_DAI_INTEL_SSP_QUIRK_SMTATF) ?
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SSCR2_SMTATF : 0;
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/* Receive data are sampled at the same/opposite clock edge specified
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* in SSPSP.SCMODE[1:0]
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*/
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sscr2 |= (ssp->params.quirks & SOF_DAI_INTEL_SSP_QUIRK_MMRATF) ?
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SSCR2_MMRATF : 0;
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/* Enable/disable the fix for PSP slave mode TXD wait for frame
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* de-assertion before starting the second channel
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*/
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sscr2 |= (ssp->params.quirks & SOF_DAI_INTEL_SSP_QUIRK_PSPSTWFDFD) ?
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SSCR2_PSPSTWFDFD : 0;
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/* Enable/disable the fix for PSP master mode FSRT with dummy stop &
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* frame end padding capability
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*/
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sscr2 |= (ssp->params.quirks & SOF_DAI_INTEL_SSP_QUIRK_PSPSRWFDFD) ?
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SSCR2_PSPSRWFDFD : 0;
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mdivc = 0x1;
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#ifdef CONFIG_CANNONLAKE
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if (!config->ssp.mclk_rate || config->ssp.mclk_rate > F_24000_kHz) {

src/include/sof/ssp.h

Lines changed: 4 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -133,9 +133,13 @@ extern const struct dai_ops ssp_ops;
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#elif defined CONFIG_APOLLOLAKE || defined CONFIG_CANNONLAKE \
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|| defined CONFIG_HASWELL || defined CONFIG_BROADWELL
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#define SSCR2_TURM1 BIT(1)
136+
#define SSCR2_PSPSRWFDFD BIT(3)
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#define SSCR2_PSPSTWFDFD BIT(4)
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#define SSCR2_SDFD BIT(14)
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#define SSCR2_SDPM BIT(16)
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#define SSCR2_LJDFD BIT(17)
141+
#define SSCR2_MMRATF BIT(18)
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#define SSCR2_SMTATF BIT(19)
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#endif
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src/include/uapi/ipc.h

Lines changed: 10 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -226,6 +226,15 @@ struct sof_ipc_compound_hdr {
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#define SOF_DAI_FMT_INV_MASK 0x0f00
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#define SOF_DAI_FMT_MASTER_MASK 0xf000
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229+
#define SOF_DAI_INTEL_SSP_QUIRK_TINTE (1 << 0) /* ssc1: TINTE */
230+
#define SOF_DAI_INTEL_SSP_QUIRK_PINTE (1 << 1) /* ssc1: PINTE */
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#define SOF_DAI_INTEL_SSP_QUIRK_SMTATF (1 << 2) /* ssc2: SMTATF */
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#define SOF_DAI_INTEL_SSP_QUIRK_MMRATF (1 << 3) /* ssc2: MMRATF */
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#define SOF_DAI_INTEL_SSP_QUIRK_PSPSTWFDFD (1 << 4) /* ssc2: PSPSTWFDFD */
234+
#define SOF_DAI_INTEL_SSP_QUIRK_PSPSRWFDFD (1 << 5) /* ssc2: PSPSRWFDFD*/
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/* here is the possibility to define others aux macros */
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/** \brief Types of DAI */
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enum sof_ipc_dai_type {
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SOF_DAI_INTEL_NONE = 0, /**< None */
@@ -259,7 +268,7 @@ struct sof_ipc_dai_ssp_params {
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uint32_t bclk_keep_active;
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uint32_t fs_keep_active;
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262-
//uint32_t quirks; // FIXME: is 32 bits enough ?
271+
uint32_t quirks; // FIXME: is 32 bits enough ?
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/* private data, e.g. for quirks */
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//uint32_t pdata[10]; // FIXME: would really need ~16 u32

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