WHACK A MOLE - DLD is based on proteus v-8. With 30-0 countdown timer and up/down score counter.

This is the VHDL codes of Computer Architecture Lab for 4th semester in B Tech CSE.

In the project, there are Proteus file of Flip Flop circuit, PCB image, Top view and 3D view of the circuit. (Proje içeriisinde Flip Flop devresinin Proteus dosyası, PCB görüntüsü, Üstten görünüş ve devrenin 3 boyutlu görüntüsü bulunmaktadır.)

A model of a 24hr clock using D flipflops and logic gates in Logisim

circuits of sequential elements

🚦 Digital logic implementation of a 4-way intersection traffic light controller using D-flip flops and state machine design. Features timing-based transitions, safe traffic flow management, and complete cycle control for North-South/East-West directions.

A digital logic-based 4-digit password lock system that uses flip-flops and logic gates to verify input and grant access via an LED indicator.

Digital password lock system implemented using D flip-flops and logic gates in Logisim.