IHP 130nm ASIC tapeout of a 2x2 bfloat16 matrix matrix multiplication with DFT infrastructure. Iteration on the previous accelerator taped out on GF180.
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Mar 25, 2026 - Verilog
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ihp-sg13g2
Here are 6 public repositories matching this topic...
Ngspice DIAMOND testbench template (SCH+PEX) for IHP SG13G2 with DC/TRAN/AC + CSV summary
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Feb 3, 2026 - Shell
Voltage Controlled Oscillator that produces 1GHz output frequency at voltage 3.3V using IHP PDK as a part of eSim Marathon
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Jan 11, 2026
Higher density Shift register - RS-flipflop version for TinyTapeout iHP26a
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Mar 23, 2026 - Verilog
Submission for Tiny Tapeout IHP26a : High Density Serial-In Serial-Out shift register using DLHQ
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Mar 23, 2026 - Verilog
An open-source 32-bit RISC-V MCU designed for IHP SG13G2 130nm BiCMOS technology. Features a PicoRV32 core, QSPI XIP, and a rich peripheral set for low-power IoT and embedded control.
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Apr 8, 2026 - Verilog
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