hBPF = eBPF in hardware

Support files for participating in a Fomu workshop

FPGA gateware and pre-build bitstreams that expose SPI over JTAG. The protocol is implemented (among others) by openocd.

AXI support for Migen/MiSoC

Open source Logic Analyzer based on LiteX SoC

Template project for LiteX-based SoCs

gateware for the main fpga, including a hispi decoder and image processing

Describing RTL circuit in Ruby

Scripts and gateware for the TinyFPGA bx

Gateware and software for Fastino (32 channel 2.5 MS/s 16 bit DAC for the Sinara ecosystem)

CPLD gateware for the Sinara Urukul module

WARC Open Fusesoc Cores Repository

Hardware Motion and Motor Control Library

A unit-test framework for testing Migen modules directely on hardware.

A Python toolbox for building complex digital hardware [fork for adding nexsys3 support]

Development of a minimal RISC-V System on Chip and integration with a computational accelerator written in Verilog. It serves as an example of a minimal architecture and as a foundation for future expansions (real hardware accelerators for scientific computing and AI).

A simple C++ project configured for use with Visual Studio Code, including IntelliSense support, custom file associations, and a GitHub Actions workflow for continuous integration. COA LiTEX

Migen framework examples