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soc: intel_adsp: Manage power gating based on core activity#89528

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kartben merged 3 commits intozephyrproject-rtos:mainfrom
tmleman:topic/upstream/pr/intel/ace/power/policy_lock_with_x_cores
Jun 6, 2025
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soc: intel_adsp: Manage power gating based on core activity#89528
kartben merged 3 commits intozephyrproject-rtos:mainfrom
tmleman:topic/upstream/pr/intel/ace/power/policy_lock_with_x_cores

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@tmleman tmleman commented May 6, 2025

This patch enhances the power management capabilities of the Intel ADSP by ensuring that power gating states are appropriately managed based on core activity. It prevents the primary core from entering power gating if secondary cores are active and re-enables power gating when all secondary cores are off, using pm_policy_state_lock_get and pm_policy_state_lock_put functions.

The Sound Open Firmware (SOF) project currently uses a custom power management policy to achieve these effects. With this patch, the default power management policy can be utilized, allowing the option to disable the custom policy while maintaining system reliability and performance across different core states.

tmleman added 2 commits May 6, 2025 15:35
This patch enhances the power management capabilities of the Intel ADSP
by ensuring that power gating states are appropriately managed based on
core activity. It prevents the primary core from entering power gating
if secondary cores are active and re-enables power gating when all
secondary cores are off, using pm_policy_state_lock_get and
pm_policy_state_lock_put functions.

The Sound Open Firmware (SOF) project currently uses a custom power
management policy to achieve these effects. With this patch, the default
power management policy can be utilized, allowing the option to disable
the custom policy while maintaining system reliability and performance
across different core states.

Signed-off-by: Tomasz Leman <tomasz.m.leman@intel.com>
This patch makes cosmetic changes to ace/power.c by updating comments to
Doxygen style, fixing typos, and removing an extraneous character for
improved readability and consistency.

Signed-off-by: Tomasz Leman <tomasz.m.leman@intel.com>
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@tmleman Can you fix the biref typo also in cavs/power.c?

kv2019i
kv2019i previously approved these changes May 6, 2025
/* The primary core cannot enter power gating if any of the secondary cores are
* active.
*/
pm_policy_state_lock_get(PM_STATE_RUNTIME_IDLE, PM_ALL_SUBSTATES);
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So each secondary gets a lock reference and when the last gives up its reference, idle is allowed, right?

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Exactly.

dcpleung
dcpleung previously approved these changes May 6, 2025
@tmleman tmleman dismissed stale reviews from dcpleung and kv2019i via afeec1d May 7, 2025 09:01
@tmleman tmleman requested review from dcpleung and kv2019i May 7, 2025 09:06
This patch makes cosmetic changes to cavs/power.c by updating comments to
Doxygen style, fixing typos.

Signed-off-by: Tomasz Leman <tomasz.m.leman@intel.com>
@tmleman
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tmleman commented May 7, 2025

SOF CI: thesofproject/sof#9992

@kartben kartben merged commit e707653 into zephyrproject-rtos:main Jun 6, 2025
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7 participants