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Staging/nord Add camss support - #883

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Staging/nord Add camss support#883
Wenmeng Liu (wenmliu) wants to merge 6 commits into
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Add Nord camss support

Add the device tree bindings for the camera subsystem (CAMSS) found on
the Qualcomm Nord SoC.

Nord's CAMSS is a gen4 Titan ISP built from 5 CSIPHY (v2.4.0), 3 CSID
plus 10 CSID lite, and 3 IFE (VFE full) plus 10 IFE lite blocks. The
CSID full/lite blocks use the "900" register layout and the IFE blocks
reuse the gen4 VFE programming model.

Each CSIPHY has its own pair of 0.8V/1.2V supplies as the rails can
differ per sensor.

Signed-off-by: Wenmeng Liu <wenmeng.liu@oss.qualcomm.com>
Add the CAMSS_NORD version and the "qcom,nord-camss" compatible for the
Qualcomm Nord camera subsystem. Nord is a gen4 Titan ISP modelled on
kaanapali.

This commit wires up the platform skeleton and the CSIPHY block:

  - 5x CSIPHY (v2.4.0), reusing csiphy_ops_3ph_1_0

Nord's CSIPHY is v2.4.0, already supported in-tree, so only the shared
gen2/init switch-cases in camss-csiphy-3ph-1-0.c gain a CAMSS_NORD entry
and no new CSIPHY register code is needed.

The CSID, VFE and TPG resource tables are added in the following
per-module commits, each filling in the corresponding nord_resources
fields.

Unlike its kaanapali/sm8750 siblings, Nord has no CPAS clocks; it uses
the CORE_AHB/TOP_FAST_AHB interface clocks and the split IFE
MAIN/PCP/SCALAR/TMC plus per-IFE TOP_IFE clock tree.

Signed-off-by: Wenmeng Liu <wenmeng.liu@oss.qualcomm.com>
Nord's test pattern generator is TPG v2.5.0, which relocates the stream
enable and reset out of TPG_CTRL/TPG_CLEAR into a dedicated command
register (TPG_CTRL_CMD) at the same 0x1F4 offset. Branch tpg_stream_on()
on the runtime hw_version so <v2.5.0 keeps the TPG_CTRL.TEST_EN bit while
v2.5.0 enables the generator through TPG_CTRL_CMD.TEST_EN.

The reset/clear bit stays bit 0 of the 0x1F4 register on every revision,
so tpg_reset() needs no version check (it also runs before the HW
version is read).

Also preserve the CFA pattern size (SIZE_X/SIZE_Y) at its reset value in
TPG_COLOR_BARS_CFG_STANDARD: writing only ROTATE_PERIOD zeroed those
fields, degenerating the pattern to 1x1 and producing no valid output.

Wire the nord TPG resource table (tpg_res_nord) into nord_resources.

Signed-off-by: Wenmeng Liu <wenmeng.liu@oss.qualcomm.com>
Add a CSID hardware driver for the "900" revision found on the Nord SoC.

CSID 900 shares the gen4 CSI-2 RX helpers and the split RUP/AUP command
model of CSID 980 (an explicit SET is required after programming the
AUP/RUP registers), but uses a single uniform register map for both CSID
full and CSID lite instances - only the RDI region base differs (full at
0x1300, lite at 0x600, 0x200 stride). This differs from CSID 980, which
forks the lite layout, so a dedicated file rather than an IS_CSID_900
variant keeps the offsets readable.

Nord has no test pattern generator wired to the CSID, so the testgen
path is a no-op as on the other gen4 platforms.

Wire the nord CSID resource table (csid_res_nord) into nord_resources.

Signed-off-by: Wenmeng Liu <wenmeng.liu@oss.qualcomm.com>
The Nord IFE (VFE) reuses the gen4 VFE ops but places the bus write
master register block at a different base and drops one register, so
add an IS_VFE_900() variant inside camss-vfe-gen4.c.

Differences from the existing gen4 (980/1080) layouts:

  - BUS_REG_BASE is 0xA00 for VFE full and 0x700 for VFE lite.
  - There is no WM_CGC_OVERRIDE register, so the clock-gating override
    write is skipped.
  - TEST_BUS_CTRL is relocated to the head of the bus write master block
    (BUS_REG_BASE - 0x1BC) instead of BUS_REG_BASE + 0x128.
  - ADDR_IMAGE takes a full byte address instead of the 256-byte-unit
    (addr >> 8) encoding, and the full-IFE RDI write-master clients start
    at index 28 (0x1C) instead of 0x17.

All other write-master register offsets match gen4 and are reused
unchanged.

Add CAMSS_NORD to the shared VFE switch-cases and wire the nord VFE
resource table (vfe_res_nord) into nord_resources, completing the
platform.

Signed-off-by: Wenmeng Liu <wenmeng.liu@oss.qualcomm.com>
Add the camera subsystem node for the Nord SoC, describing its 5 CSIPHY,
3 CSID + 10 CSID lite and 3 IFE + 10 IFE lite blocks, their clocks,
interrupts, interconnects, SMMU stream IDs and power domains.

The node is left disabled; it is enabled per board once the CSI input
ports and CSIPHY supplies are wired to the on-board sensors.

Signed-off-by: Wenmeng Liu <wenmeng.liu@oss.qualcomm.com>
@wenmliu
Wenmeng Liu (wenmliu) marked this pull request as draft July 31, 2026 10:19
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