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Staging/nord Add camss support #883

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7dd201a
dt-bindings: media: Add bindings for qcom,nord-camss
wenmliu Jul 31, 2026
935c854
media: qcom: camss: Add nord compatible camss driver
wenmliu Jul 31, 2026
ef12b05
media: qcom: camss: tpg: Add support for TPG v2.5.0
wenmliu Jul 31, 2026
3f049e2
media: qcom: camss: csid: Add support for CSID 900
wenmliu Jul 31, 2026
3747121
media: qcom: camss: vfe: Add support for VFE 900
wenmliu Jul 31, 2026
d4df077
arm64: dts: qcom: nord: Add camss node
wenmliu Jul 20, 2026
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577 changes: 577 additions & 0 deletions Documentation/devicetree/bindings/media/qcom,nord-camss.yaml
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278 changes: 278 additions & 0 deletions arch/arm64/boot/dts/qcom/nord-embedded.dtsi
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Original file line number Diff line number Diff line change
Expand Up @@ -792,6 +792,284 @@
#power-domain-cells = <1>;
};

camss: isp@9b32000 {
compatible = "qcom,nord-camss";

reg = <0 0x09b32000 0 0x2000>,
<0 0x09b38800 0 0x2000>,
<0 0x09b3f000 0 0x2000>,
<0 0x09c32000 0 0x1000>,
<0 0x09c37000 0 0x1000>,
<0 0x09c3c000 0 0x1000>,
<0 0x09c41000 0 0x1000>,
<0 0x09c46000 0 0x1000>,
<0 0x09c4b000 0 0x1000>,
<0 0x09c50000 0 0x1000>,
<0 0x09c55000 0 0x1000>,
<0 0x09c5a000 0 0x1000>,
<0 0x09c5f000 0 0x1000>,
<0 0x09c7b000 0 0x2000>,
<0 0x09c7d000 0 0x2000>,
<0 0x09c7f000 0 0x2000>,
<0 0x09c81000 0 0x2000>,
<0 0x09c83000 0 0x2000>,
<0 0x09a92000 0 0x400>,
<0 0x09a93000 0 0x400>,
<0 0x09a94000 0 0x400>,
<0 0x09ab1000 0 0x4000>,
<0 0x09ad1000 0 0x4000>,
<0 0x09af1000 0 0x4000>,
<0 0x09c34000 0 0x2000>,
<0 0x09c39000 0 0x2000>,
<0 0x09c3e000 0 0x2000>,
<0 0x09c43000 0 0x2000>,
<0 0x09c48000 0 0x2000>,
<0 0x09c4d000 0 0x2000>,
<0 0x09c52000 0 0x2000>,
<0 0x09c57000 0 0x2000>,
<0 0x09c5c000 0 0x2000>,
<0 0x09c61000 0 0x2000>;

reg-names = "csid0",
"csid1",
"csid2",
"csid_lite0",
"csid_lite1",
"csid_lite2",
"csid_lite3",
"csid_lite4",
"csid_lite5",
"csid_lite6",
"csid_lite7",
"csid_lite8",
"csid_lite9",
"csiphy0",
"csiphy1",
"csiphy2",
"csiphy3",
"csiphy4",
"csitpg0",
"csitpg1",
"csitpg2",
"vfe0",
"vfe1",
"vfe2",
"vfe_lite0",
"vfe_lite1",
"vfe_lite2",
"vfe_lite3",
"vfe_lite4",
"vfe_lite5",
"vfe_lite6",
"vfe_lite7",
"vfe_lite8",
"vfe_lite9";

clocks = <&camcc CAM_CC_CAMNOC_NRT_AXI_CLK>,
<&camcc CAM_CC_CAMNOC_RT_AXI_CLK>,
<&camcc CAM_CC_CORE_AHB_CLK>,
<&camcc CAM_CC_CSID_CLK>,
<&camcc CAM_CC_CSID_CSIPHY_RX_CLK>,
<&camcc CAM_CC_CSIPHY0_CLK>,
<&camcc CAM_CC_CSI0PHYTIMER_CLK>,
<&camcc CAM_CC_CSIPHY1_CLK>,
<&camcc CAM_CC_CSI1PHYTIMER_CLK>,
<&camcc CAM_CC_CSIPHY2_CLK>,
<&camcc CAM_CC_CSI2PHYTIMER_CLK>,
<&camcc CAM_CC_CSIPHY3_CLK>,
<&camcc CAM_CC_CSI3PHYTIMER_CLK>,
<&camcc CAM_CC_CSIPHY4_CLK>,
<&camcc CAM_CC_CSI4PHYTIMER_CLK>,
<&nwgcc NW_GCC_CAMERA_HF_AXI_CLK>,
<&camcc CAM_CC_TOP_AHB_CLK>,
<&camcc CAM_CC_TOP_FAST_AHB_CLK>,
<&camcc CAM_CC_TOP_IFE_0_CLK>,
<&camcc CAM_CC_TOP_IFE_1_CLK>,
<&camcc CAM_CC_TOP_IFE_2_CLK>,
<&camcc CAM_CC_TOP_IFE_LITE_CLK>,
<&camcc CAM_CC_IFE_0_MAIN_CLK>,
<&camcc CAM_CC_IFE_0_MAIN_FAST_AHB_CLK>,
<&camcc CAM_CC_IFE_0_PCP_CLK>,
<&camcc CAM_CC_IFE_0_PCP_FAST_AHB_CLK>,
<&camcc CAM_CC_IFE_0_TMC_CLK>,
<&camcc CAM_CC_IFE_0_TMC_FAST_AHB_CLK>,
<&camcc CAM_CC_IFE_0_SCALAR_CLK>,
<&camcc CAM_CC_IFE_0_SCALAR_FAST_AHB_CLK>,
<&camcc CAM_CC_IFE_1_MAIN_CLK>,
<&camcc CAM_CC_IFE_1_MAIN_FAST_AHB_CLK>,
<&camcc CAM_CC_IFE_1_PCP_CLK>,
<&camcc CAM_CC_IFE_1_PCP_FAST_AHB_CLK>,
<&camcc CAM_CC_IFE_1_TMC_CLK>,
<&camcc CAM_CC_IFE_1_TMC_FAST_AHB_CLK>,
<&camcc CAM_CC_IFE_1_SCALAR_CLK>,
<&camcc CAM_CC_IFE_1_SCALAR_FAST_AHB_CLK>,
<&camcc CAM_CC_IFE_2_MAIN_CLK>,
<&camcc CAM_CC_IFE_2_MAIN_FAST_AHB_CLK>,
<&camcc CAM_CC_IFE_2_PCP_CLK>,
<&camcc CAM_CC_IFE_2_PCP_FAST_AHB_CLK>,
<&camcc CAM_CC_IFE_2_TMC_CLK>,
<&camcc CAM_CC_IFE_2_TMC_FAST_AHB_CLK>,
<&camcc CAM_CC_IFE_2_SCALAR_CLK>,
<&camcc CAM_CC_IFE_2_SCALAR_FAST_AHB_CLK>,
<&camcc CAM_CC_IFE_LITE_CLK>,
<&camcc CAM_CC_IFE_LITE_AHB_CLK>,
<&camcc CAM_CC_IFE_LITE_CPHY_RX_CLK>,
<&camcc CAM_CC_IFE_LITE_CSID_CLK>,
<&camcc CAM_CC_TPG_CSIPHY_RX_CLK>,
<&camcc CAM_CC_QDSS_DEBUG_XO_CLK>;

clock-names = "camnoc_nrt_axi",
"camnoc_rt_axi",
"core_ahb",
"csid",
"csid_csiphy_rx",
"csiphy0",
"csiphy0_timer",
"csiphy1",
"csiphy1_timer",
"csiphy2",
"csiphy2_timer",
"csiphy3",
"csiphy3_timer",
"csiphy4",
"csiphy4_timer",
"gcc_axi_hf",
"top_ahb",
"top_fast_ahb",
"top_ife0",
"top_ife1",
"top_ife2",
"top_ife_lite",
"vfe0",
"vfe0_fast_ahb",
"vfe0_pcp",
"vfe0_pcp_fast_ahb",
"vfe0_tmc",
"vfe0_tmc_fast_ahb",
"vfe0_scalar",
"vfe0_scalar_fast_ahb",
"vfe1",
"vfe1_fast_ahb",
"vfe1_pcp",
"vfe1_pcp_fast_ahb",
"vfe1_tmc",
"vfe1_tmc_fast_ahb",
"vfe1_scalar",
"vfe1_scalar_fast_ahb",
"vfe2",
"vfe2_fast_ahb",
"vfe2_pcp",
"vfe2_pcp_fast_ahb",
"vfe2_tmc",
"vfe2_tmc_fast_ahb",
"vfe2_scalar",
"vfe2_scalar_fast_ahb",
"vfe_lite",
"vfe_lite_ahb",
"vfe_lite_cphy_rx",
"vfe_lite_csid",
"tpg_csiphy_rx",
"qdss_debug_xo";

interrupts = <GIC_SPI 601 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 603 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 431 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 605 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 376 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 413 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 416 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 417 IRQ_TYPE_LEVEL_HIGH>,
<GIC_ESPI 19 IRQ_TYPE_EDGE_RISING>,
<GIC_ESPI 17 IRQ_TYPE_EDGE_RISING>,
<GIC_ESPI 15 IRQ_TYPE_EDGE_RISING>,
<GIC_ESPI 13 IRQ_TYPE_EDGE_RISING>,
<GIC_ESPI 11 IRQ_TYPE_EDGE_RISING>,
<GIC_ESPI 9 IRQ_TYPE_EDGE_RISING>,
<GIC_ESPI 7 IRQ_TYPE_EDGE_RISING>,
<GIC_ESPI 5 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 477 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 478 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 479 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 448 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 122 IRQ_TYPE_EDGE_RISING>,
<GIC_ESPI 22 IRQ_TYPE_EDGE_RISING>,
<GIC_ESPI 21 IRQ_TYPE_EDGE_RISING>,
<GIC_ESPI 20 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 606 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 377 IRQ_TYPE_EDGE_RISING>,
<GIC_ESPI 18 IRQ_TYPE_EDGE_RISING>,
<GIC_ESPI 16 IRQ_TYPE_EDGE_RISING>,
<GIC_ESPI 14 IRQ_TYPE_EDGE_RISING>,
<GIC_ESPI 12 IRQ_TYPE_EDGE_RISING>,
<GIC_ESPI 10 IRQ_TYPE_EDGE_RISING>,
<GIC_ESPI 8 IRQ_TYPE_EDGE_RISING>,
<GIC_ESPI 6 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 795 IRQ_TYPE_EDGE_RISING>;

interrupt-names = "csid0",
"csid1",
"csid2",
"csid_lite0",
"csid_lite1",
"csid_lite2",
"csid_lite3",
"csid_lite4",
"csid_lite5",
"csid_lite6",
"csid_lite7",
"csid_lite8",
"csid_lite9",
"csiphy0",
"csiphy1",
"csiphy2",
"csiphy3",
"csiphy4",
"csitpg0",
"csitpg1",
"csitpg2",
"vfe0",
"vfe1",
"vfe2",
"vfe_lite0",
"vfe_lite1",
"vfe_lite2",
"vfe_lite3",
"vfe_lite4",
"vfe_lite5",
"vfe_lite6",
"vfe_lite7",
"vfe_lite8",
"vfe_lite9";

interconnects = <&hscnoc MASTER_APPSS_PROC QCOM_ICC_TAG_ACTIVE_ONLY
&config_noc SLAVE_CAMERA_CFG QCOM_ICC_TAG_ACTIVE_ONLY>,
<&mmss_noc MASTER_CAMNOC_HF QCOM_ICC_TAG_ALWAYS
&mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS>;

interconnect-names = "ahb",
"hf_mnoc";

iommus = <&apps_smmu_2 0x1401 0x20>,
<&apps_smmu_2 0x1460 0x00>;

power-domains = <&camcc CAM_CC_IFE_0_GDSC>,
<&camcc CAM_CC_IFE_1_GDSC>,
<&camcc CAM_CC_IFE_2_GDSC>,
<&camcc CAM_CC_TITAN_TOP_GDSC>;

power-domain-names = "ife0",
"ife1",
"ife2",
"top";

status = "okay";

ports {
#address-cells = <1>;
#size-cells = <0>;
};
};

camcc: clock-controller@9ce0000 {
compatible = "qcom,nord-camcc";
reg = <0x0 0x09ce0000 0x0 0x20000>;
Expand Down
1 change: 1 addition & 0 deletions drivers/media/platform/qcom/camss/Makefile
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Original file line number Diff line number Diff line change
Expand Up @@ -8,6 +8,7 @@ qcom-camss-objs += \
camss-csid-4-7.o \
camss-csid-340.o \
camss-csid-680.o \
camss-csid-900.o \
camss-csid-980.o \
camss-csid-gen2.o \
camss-csid-gen3.o \
Expand Down
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