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feat(spacemit): add TCM memory barrier support #11

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feat(spacemit): add TCM memory barrier support #11

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5 changes: 4 additions & 1 deletion ggml/src/ggml-cpu/spacemit/ime.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -1718,23 +1718,26 @@ void ggml_backend_cpu_riscv64_spacemit_set_numa_thread_affinity(int thread_n) {
ggml::cpu::riscv64_spacemit::tls_context.tcm_buffer_size =
ggml::cpu::riscv64_spacemit::global_spine_env_info.tcm_blk_size;
}

#ifdef GGML_ENABLE_TCM_MEM_BARRIER
if (ggml::cpu::riscv64_spacemit::tls_context.tcm_buffer != nullptr) {
void * rt =
ggml::cpu::riscv64_spacemit::spine_mem_pool_tcm_mem_wait(ggml::cpu::riscv64_spacemit::tls_context.cpu_id);
if (rt == nullptr) {
GGML_ABORT("wait tcm buffer failed for cpu_id: %d", ggml::cpu::riscv64_spacemit::tls_context.cpu_id);
Comment on lines 1722 to 1726
}
}
#endif
}

void ggml_backend_cpu_riscv64_spacemit_clear_numa_thread_affinity_threaded(int thread_n) {
#ifdef GGML_ENABLE_TCM_MEM_BARRIER
if (ggml::cpu::riscv64_spacemit::tls_context.tcm_buffer != nullptr) {
auto rt = ggml::cpu::riscv64_spacemit::spine_mem_pool_tcm_mem_release(
ggml::cpu::riscv64_spacemit::tls_context.cpu_id);
if (rt != 0) {
GGML_ABORT("release tcm buffer failed for cpu_id: %d", ggml::cpu::riscv64_spacemit::tls_context.cpu_id);
}
}
Comment on lines 1735 to 1740
#endif
}
}
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